mirror of
https://github.com/torvalds/linux.git
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a5967db9af
ld -r is an incremental link used to create built-in.o files in build subdirectories. It produces relocatable object files containing all its input files, and these are are then pulled together and relocated in the final link. Aside from the bloat, this constrains the final link relocations, which has bitten large powerpc builds with unresolvable relocations in the final link. Alan Modra has recommended the kernel use thin archives for linking. This is an alternative and means that the linker has more information available to it when it links the kernel. This patch enables a config option architectures can select, which causes all built-in.o files to be built as thin archives. built-in.o files in subdirectories do not get symbol table or index attached, which improves speed and size. The final link pass creates a built-in.o archive in the root output directory which includes the symbol table and index. The linker then uses takes this file to link. The --whole-archive linker option is required, because the linker now has visibility to every individual object file, and it will otherwise just completely avoid including those without external references (consider a file with EXPORT_SYMBOL or initcall or hardware exceptions as its only entry points). The traditional built works "by luck" as built-in.o files are large enough that they're going to get external references. However this optimisation is unpredictable for the kernel (due to above external references), ineffective at culling unused, and costly because the .o files have to be searched for references. Superior alternatives for link-time culling should be used instead. Build characteristics for inclink vs thinarc, on a small powerpc64le pseries VM with a modest .config: inclink thinarc sizes vmlinux 15 618 680 15 625 028 sum of all built-in.o 56 091 808 1 054 334 sum excluding root built-in.o 151 430 find -name built-in.o | xargs rm ; time make vmlinux real 22.772s 21.143s user 13.280s 13.430s sys 4.310s 2.750s - Final kernel pulled in only about 6K more, which shows how ineffective the object file culling is. - Build performance looks improved due to less pagecache activity. On IO constrained systems it could be a bigger win. - Build size saving is significant. Side note, the toochain understands archives, so there's some tricks, $ ar t built-in.o # list all files you linked with $ size built-in.o # and their sizes $ objdump -d built-in.o # disassembly (unrelocated) with filenames Implementation by sfr, minor tweaks by npiggin. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michal Marek <mmarek@suse.com>
500 lines
16 KiB
Makefile
500 lines
16 KiB
Makefile
# ==========================================================================
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# Building
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# ==========================================================================
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src := $(obj)
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PHONY := __build
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__build:
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# Init all relevant variables used in kbuild files so
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# 1) they have correct type
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# 2) they do not inherit any value from the environment
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obj-y :=
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obj-m :=
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lib-y :=
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lib-m :=
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always :=
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targets :=
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subdir-y :=
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subdir-m :=
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EXTRA_AFLAGS :=
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EXTRA_CFLAGS :=
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EXTRA_CPPFLAGS :=
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EXTRA_LDFLAGS :=
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asflags-y :=
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ccflags-y :=
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cppflags-y :=
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ldflags-y :=
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subdir-asflags-y :=
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subdir-ccflags-y :=
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# Read auto.conf if it exists, otherwise ignore
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-include include/config/auto.conf
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include scripts/Kbuild.include
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# For backward compatibility check that these variables do not change
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save-cflags := $(CFLAGS)
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# The filename Kbuild has precedence over Makefile
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kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
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kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
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include $(kbuild-file)
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# If the save-* variables changed error out
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ifeq ($(KBUILD_NOPEDANTIC),)
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ifneq ("$(save-cflags)","$(CFLAGS)")
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$(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
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endif
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endif
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include scripts/Makefile.lib
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ifdef host-progs
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ifneq ($(hostprogs-y),$(host-progs))
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$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
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hostprogs-y += $(host-progs)
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endif
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endif
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# Do not include host rules unless needed
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ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),)
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include scripts/Makefile.host
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endif
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ifneq ($(KBUILD_SRC),)
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# Create output directory if not already present
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_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
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# Create directories for object files if directory does not exist
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# Needed when obj-y := dir/file.o syntax is used
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_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
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endif
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ifndef obj
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$(warning kbuild: Makefile.build is included improperly)
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endif
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# ===========================================================================
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ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
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lib-target := $(obj)/lib.a
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obj-y += $(obj)/lib-ksyms.o
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endif
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ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
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builtin-target := $(obj)/built-in.o
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endif
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modorder-target := $(obj)/modules.order
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# We keep a list of all modules in $(MODVERDIR)
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__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
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$(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
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$(subdir-ym) $(always)
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@:
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# Linus' kernel sanity checking tool
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ifneq ($(KBUILD_CHECKSRC),0)
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ifeq ($(KBUILD_CHECKSRC),2)
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quiet_cmd_force_checksrc = CHECK $<
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cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
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else
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quiet_cmd_checksrc = CHECK $<
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cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
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endif
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endif
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# Do section mismatch analysis for each module/built-in.o
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ifdef CONFIG_DEBUG_SECTION_MISMATCH
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cmd_secanalysis = ; scripts/mod/modpost $@
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endif
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# Compile C sources (.c)
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# ---------------------------------------------------------------------------
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# Default is built-in, unless we know otherwise
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modkern_cflags = \
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$(if $(part-of-module), \
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$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
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$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
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quiet_modtag := $(empty) $(empty)
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$(real-objs-m) : part-of-module := y
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$(real-objs-m:.o=.i) : part-of-module := y
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$(real-objs-m:.o=.s) : part-of-module := y
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$(real-objs-m:.o=.lst): part-of-module := y
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$(real-objs-m) : quiet_modtag := [M]
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$(real-objs-m:.o=.i) : quiet_modtag := [M]
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$(real-objs-m:.o=.s) : quiet_modtag := [M]
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$(real-objs-m:.o=.lst): quiet_modtag := [M]
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$(obj-m) : quiet_modtag := [M]
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# Default for not multi-part modules
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modname = $(basetarget)
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$(multi-objs-m) : modname = $(modname-multi)
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$(multi-objs-m:.o=.i) : modname = $(modname-multi)
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$(multi-objs-m:.o=.s) : modname = $(modname-multi)
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$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
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$(multi-objs-y) : modname = $(modname-multi)
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$(multi-objs-y:.o=.i) : modname = $(modname-multi)
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$(multi-objs-y:.o=.s) : modname = $(modname-multi)
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$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
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quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
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cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
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$(obj)/%.s: $(src)/%.c FORCE
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$(call if_changed_dep,cc_s_c)
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quiet_cmd_cpp_i_c = CPP $(quiet_modtag) $@
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cmd_cpp_i_c = $(CPP) $(c_flags) -o $@ $<
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$(obj)/%.i: $(src)/%.c FORCE
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$(call if_changed_dep,cpp_i_c)
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cmd_gensymtypes = \
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$(CPP) -D__GENKSYMS__ $(c_flags) $< | \
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$(GENKSYMS) $(if $(1), -T $(2)) \
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$(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
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$(if $(KBUILD_PRESERVE),-p) \
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-r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
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quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
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cmd_cc_symtypes_c = \
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set -e; \
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$(call cmd_gensymtypes,true,$@) >/dev/null; \
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test -s $@ || rm -f $@
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$(obj)/%.symtypes : $(src)/%.c FORCE
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$(call cmd,cc_symtypes_c)
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# C (.c) files
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# The C file is compiled and updated dependency information is generated.
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# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
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quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
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ifndef CONFIG_MODVERSIONS
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cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
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else
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# When module versioning is enabled the following steps are executed:
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# o compile a .tmp_<file>.o from <file>.c
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# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
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# not export symbols, we just rename .tmp_<file>.o to <file>.o and
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# are done.
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# o otherwise, we calculate symbol versions using the good old
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# genksyms on the preprocessed source and postprocess them in a way
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# that they are usable as a linker script
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# o generate <file>.o from .tmp_<file>.o using the linker to
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# replace the unresolved symbols __crc_exported_symbol with
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# the actual value of the checksum generated by genksyms
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cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
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cmd_modversions = \
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if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
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$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
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> $(@D)/.tmp_$(@F:.o=.ver); \
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\
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$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
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-T $(@D)/.tmp_$(@F:.o=.ver); \
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rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
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else \
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mv -f $(@D)/.tmp_$(@F) $@; \
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fi;
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endif
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ifdef CONFIG_FTRACE_MCOUNT_RECORD
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ifdef BUILD_C_RECORDMCOUNT
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ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
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RECORDMCOUNT_FLAGS = -w
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endif
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# Due to recursion, we must skip empty.o.
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# The empty.o file is created in the make process in order to determine
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# the target endianness and word size. It is made before all other C
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# files, including recordmcount.
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sub_cmd_record_mcount = \
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if [ $(@) != "scripts/mod/empty.o" ]; then \
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$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
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fi;
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recordmcount_source := $(srctree)/scripts/recordmcount.c \
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$(srctree)/scripts/recordmcount.h
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else
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sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
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"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
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"$(if $(CONFIG_64BIT),64,32)" \
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"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
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"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
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"$(if $(part-of-module),1,0)" "$(@)";
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recordmcount_source := $(srctree)/scripts/recordmcount.pl
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endif
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cmd_record_mcount = \
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if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
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"$(CC_FLAGS_FTRACE)" ]; then \
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$(sub_cmd_record_mcount) \
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fi;
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endif
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ifdef CONFIG_STACK_VALIDATION
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ifneq ($(SKIP_STACK_VALIDATION),1)
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__objtool_obj := $(objtree)/tools/objtool/objtool
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objtool_args = check
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ifndef CONFIG_FRAME_POINTER
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objtool_args += --no-fp
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endif
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# 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
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# 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
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# 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
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cmd_objtool = $(if $(patsubst y%,, \
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$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
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$(__objtool_obj) $(objtool_args) "$(@)";)
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objtool_obj = $(if $(patsubst y%,, \
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$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
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$(__objtool_obj))
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endif # SKIP_STACK_VALIDATION
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endif # CONFIG_STACK_VALIDATION
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define rule_cc_o_c
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$(call echo-cmd,checksrc) $(cmd_checksrc) \
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$(call cmd_and_fixdep,cc_o_c) \
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$(cmd_modversions) \
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$(cmd_objtool) \
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$(call echo-cmd,record_mcount) $(cmd_record_mcount)
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endef
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define rule_as_o_S
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$(call cmd_and_fixdep,as_o_S) \
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$(cmd_objtool)
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endef
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# List module undefined symbols (or empty line if not enabled)
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ifdef CONFIG_TRIM_UNUSED_KSYMS
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cmd_undef_syms = $(NM) $@ | sed -n 's/^ \+U //p' | xargs echo
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else
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cmd_undef_syms = echo
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endif
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# Built-in and composite module parts
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$(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
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$(call cmd,force_checksrc)
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$(call if_changed_rule,cc_o_c)
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# Single-part modules are special since we need to mark them in $(MODVERDIR)
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$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
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$(call cmd,force_checksrc)
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$(call if_changed_rule,cc_o_c)
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@{ echo $(@:.o=.ko); echo $@; \
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$(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod)
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quiet_cmd_cc_lst_c = MKLST $@
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cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
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$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
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System.map $(OBJDUMP) > $@
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$(obj)/%.lst: $(src)/%.c FORCE
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$(call if_changed_dep,cc_lst_c)
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# Compile assembler sources (.S)
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# ---------------------------------------------------------------------------
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modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
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$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
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$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
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quiet_cmd_cpp_s_S = CPP $(quiet_modtag) $@
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cmd_cpp_s_S = $(CPP) $(a_flags) -o $@ $<
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$(obj)/%.s: $(src)/%.S FORCE
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$(call if_changed_dep,cpp_s_S)
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quiet_cmd_as_o_S = AS $(quiet_modtag) $@
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cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
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$(obj)/%.o: $(src)/%.S $(objtool_obj) FORCE
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$(call if_changed_rule,as_o_S)
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targets += $(real-objs-y) $(real-objs-m) $(lib-y)
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targets += $(extra-y) $(MAKECMDGOALS) $(always)
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# Linker scripts preprocessor (.lds.S -> .lds)
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# ---------------------------------------------------------------------------
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quiet_cmd_cpp_lds_S = LDS $@
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cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
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-D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
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$(obj)/%.lds: $(src)/%.lds.S FORCE
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$(call if_changed_dep,cpp_lds_S)
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# ASN.1 grammar
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# ---------------------------------------------------------------------------
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quiet_cmd_asn1_compiler = ASN.1 $@
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cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
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$(subst .h,.c,$@) $(subst .c,.h,$@)
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.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
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$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
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$(call cmd,asn1_compiler)
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# Build the compiled-in targets
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# ---------------------------------------------------------------------------
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# To build objects in subdirs, we need to descend into the directories
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$(sort $(subdir-obj-y)): $(subdir-ym) ;
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#
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# Rule to compile a set of .o files into one .o file
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#
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ifdef builtin-target
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ifdef CONFIG_THIN_ARCHIVES
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cmd_make_builtin = rm -f $@; $(AR) rcST$(KBUILD_ARFLAGS)
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cmd_make_empty_builtin = rm -f $@; $(AR) rcST$(KBUILD_ARFLAGS)
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quiet_cmd_link_o_target = AR $@
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else
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cmd_make_builtin = $(LD) $(ld_flags) -r -o
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cmd_make_empty_builtin = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS)
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quiet_cmd_link_o_target = LD $@
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endif
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# If the list of objects to link is empty, just create an empty built-in.o
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cmd_link_o_target = $(if $(strip $(obj-y)),\
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$(cmd_make_builtin) $@ $(filter $(obj-y), $^) \
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$(cmd_secanalysis),\
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$(cmd_make_empty_builtin) $@)
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$(builtin-target): $(obj-y) FORCE
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$(call if_changed,link_o_target)
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targets += $(builtin-target)
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endif # builtin-target
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#
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# Rule to create modules.order file
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#
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# Create commands to either record .ko file or cat modules.order from
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# a subdirectory
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modorder-cmds = \
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$(foreach m, $(modorder), \
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$(if $(filter %/modules.order, $m), \
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cat $m;, echo kernel/$m;))
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$(modorder-target): $(subdir-ym) FORCE
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$(Q)(cat /dev/null; $(modorder-cmds)) > $@
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#
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# Rule to compile a set of .o files into one .a file
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#
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ifdef lib-target
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quiet_cmd_link_l_target = AR $@
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ifdef CONFIG_THIN_ARCHIVES
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cmd_link_l_target = rm -f $@; $(AR) rcsT$(KBUILD_ARFLAGS) $@ $(lib-y)
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else
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cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
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endif
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$(lib-target): $(lib-y) FORCE
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$(call if_changed,link_l_target)
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targets += $(lib-target)
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dummy-object = $(obj)/.lib_exports.o
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ksyms-lds = $(dot-target).lds
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ifdef CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX
|
|
ref_prefix = EXTERN(_
|
|
else
|
|
ref_prefix = EXTERN(
|
|
endif
|
|
|
|
quiet_cmd_export_list = EXPORTS $@
|
|
cmd_export_list = $(OBJDUMP) -h $< | \
|
|
sed -ne '/___ksymtab/{s/.*+/$(ref_prefix)/;s/ .*/)/;p}' >$(ksyms-lds);\
|
|
rm -f $(dummy-object);\
|
|
$(AR) rcs$(KBUILD_ARFLAGS) $(dummy-object);\
|
|
$(LD) $(ld_flags) -r -o $@ -T $(ksyms-lds) $(dummy-object);\
|
|
rm $(dummy-object) $(ksyms-lds)
|
|
|
|
$(obj)/lib-ksyms.o: $(lib-target) FORCE
|
|
$(call if_changed,export_list)
|
|
endif
|
|
|
|
#
|
|
# Rule to link composite objects
|
|
#
|
|
# Composite objects are specified in kbuild makefile as follows:
|
|
# <composite-object>-objs := <list of .o files>
|
|
# or
|
|
# <composite-object>-y := <list of .o files>
|
|
# or
|
|
# <composite-object>-m := <list of .o files>
|
|
# The -m syntax only works if <composite object> is a module
|
|
link_multi_deps = \
|
|
$(filter $(addprefix $(obj)/, \
|
|
$($(subst $(obj)/,,$(@:.o=-objs))) \
|
|
$($(subst $(obj)/,,$(@:.o=-y))) \
|
|
$($(subst $(obj)/,,$(@:.o=-m)))), $^)
|
|
|
|
quiet_cmd_link_multi-y = LD $@
|
|
cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
|
|
|
|
quiet_cmd_link_multi-m = LD [M] $@
|
|
cmd_link_multi-m = $(cmd_link_multi-y)
|
|
|
|
$(multi-used-y): FORCE
|
|
$(call if_changed,link_multi-y)
|
|
$(call multi_depend, $(multi-used-y), .o, -objs -y)
|
|
|
|
$(multi-used-m): FORCE
|
|
$(call if_changed,link_multi-m)
|
|
@{ echo $(@:.o=.ko); echo $(link_multi_deps); \
|
|
$(cmd_undef_syms); } > $(MODVERDIR)/$(@F:.o=.mod)
|
|
$(call multi_depend, $(multi-used-m), .o, -objs -y -m)
|
|
|
|
targets += $(multi-used-y) $(multi-used-m)
|
|
|
|
|
|
# Descending
|
|
# ---------------------------------------------------------------------------
|
|
|
|
PHONY += $(subdir-ym)
|
|
$(subdir-ym):
|
|
$(Q)$(MAKE) $(build)=$@
|
|
|
|
# Add FORCE to the prequisites of a target to force it to be always rebuilt.
|
|
# ---------------------------------------------------------------------------
|
|
|
|
PHONY += FORCE
|
|
|
|
FORCE:
|
|
|
|
# Read all saved command lines and dependencies for the $(targets) we
|
|
# may be building above, using $(if_changed{,_dep}). As an
|
|
# optimization, we don't need to read them if the target does not
|
|
# exist, we will rebuild anyway in that case.
|
|
|
|
targets := $(wildcard $(sort $(targets)))
|
|
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
|
|
|
|
ifneq ($(cmd_files),)
|
|
include $(cmd_files)
|
|
endif
|
|
|
|
# Declare the contents of the .PHONY variable as phony. We keep that
|
|
# information in a variable se we can use it in if_changed and friends.
|
|
|
|
.PHONY: $(PHONY)
|