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220387048d
As SMP-on-UP is a valid configuration on 32bit ARM, do not assume that IPIs are populated in show_ipi_list(). Reported-by: Guillaume Tucker <guillaume.tucker@collabora.com> Reported-by: kernelci.org bot <bot@kernelci.org> Tested-by: Guillaume Tucker <guillaume.tucker@collabora.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
863 lines
19 KiB
C
863 lines
19 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/kernel/smp.c
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*
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* Copyright (C) 2002 ARM Limited, All Rights Reserved.
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/sched/mm.h>
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#include <linux/sched/hotplug.h>
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#include <linux/sched/task_stack.h>
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#include <linux/interrupt.h>
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#include <linux/cache.h>
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#include <linux/profile.h>
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#include <linux/errno.h>
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#include <linux/mm.h>
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#include <linux/err.h>
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#include <linux/cpu.h>
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#include <linux/seq_file.h>
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#include <linux/irq.h>
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#include <linux/nmi.h>
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#include <linux/percpu.h>
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#include <linux/clockchips.h>
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#include <linux/completion.h>
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#include <linux/cpufreq.h>
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#include <linux/irq_work.h>
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#include <linux/kernel_stat.h>
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#include <linux/atomic.h>
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#include <asm/bugs.h>
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#include <asm/smp.h>
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#include <asm/cacheflush.h>
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#include <asm/cpu.h>
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#include <asm/cputype.h>
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#include <asm/exception.h>
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#include <asm/idmap.h>
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#include <asm/topology.h>
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#include <asm/mmu_context.h>
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#include <asm/procinfo.h>
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#include <asm/processor.h>
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#include <asm/sections.h>
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#include <asm/tlbflush.h>
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#include <asm/ptrace.h>
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#include <asm/smp_plat.h>
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#include <asm/virt.h>
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#include <asm/mach/arch.h>
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#include <asm/mpu.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/ipi.h>
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/*
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* as from 2.5, kernels no longer have an init_tasks structure
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* so we need some other way of telling a new secondary core
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* where to place its SVC stack
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*/
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struct secondary_data secondary_data;
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enum ipi_msg_type {
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IPI_WAKEUP,
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IPI_TIMER,
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IPI_RESCHEDULE,
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IPI_CALL_FUNC,
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IPI_CPU_STOP,
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IPI_IRQ_WORK,
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IPI_COMPLETION,
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NR_IPI,
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/*
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* CPU_BACKTRACE is special and not included in NR_IPI
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* or tracable with trace_ipi_*
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*/
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IPI_CPU_BACKTRACE = NR_IPI,
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/*
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* SGI8-15 can be reserved by secure firmware, and thus may
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* not be usable by the kernel. Please keep the above limited
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* to at most 8 entries.
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*/
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MAX_IPI
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};
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static int ipi_irq_base __read_mostly;
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static int nr_ipi __read_mostly = NR_IPI;
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static struct irq_desc *ipi_desc[MAX_IPI] __read_mostly;
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static void ipi_setup(int cpu);
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static DECLARE_COMPLETION(cpu_running);
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static struct smp_operations smp_ops __ro_after_init;
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void __init smp_set_ops(const struct smp_operations *ops)
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{
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if (ops)
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smp_ops = *ops;
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};
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static unsigned long get_arch_pgd(pgd_t *pgd)
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{
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#ifdef CONFIG_ARM_LPAE
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return __phys_to_pfn(virt_to_phys(pgd));
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#else
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return virt_to_phys(pgd);
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#endif
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}
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#if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
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static int secondary_biglittle_prepare(unsigned int cpu)
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{
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if (!cpu_vtable[cpu])
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cpu_vtable[cpu] = kzalloc(sizeof(*cpu_vtable[cpu]), GFP_KERNEL);
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return cpu_vtable[cpu] ? 0 : -ENOMEM;
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}
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static void secondary_biglittle_init(void)
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{
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init_proc_vtable(lookup_processor(read_cpuid_id())->proc);
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}
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#else
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static int secondary_biglittle_prepare(unsigned int cpu)
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{
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return 0;
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}
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static void secondary_biglittle_init(void)
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{
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}
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#endif
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int __cpu_up(unsigned int cpu, struct task_struct *idle)
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{
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int ret;
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if (!smp_ops.smp_boot_secondary)
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return -ENOSYS;
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ret = secondary_biglittle_prepare(cpu);
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if (ret)
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return ret;
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/*
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* We need to tell the secondary core where to find
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* its stack and the page tables.
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*/
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secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
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#ifdef CONFIG_ARM_MPU
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secondary_data.mpu_rgn_info = &mpu_rgn_info;
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#endif
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#ifdef CONFIG_MMU
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secondary_data.pgdir = virt_to_phys(idmap_pgd);
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secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
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#endif
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sync_cache_w(&secondary_data);
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/*
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* Now bring the CPU into our world.
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*/
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ret = smp_ops.smp_boot_secondary(cpu, idle);
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if (ret == 0) {
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/*
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* CPU was successfully started, wait for it
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* to come online or time out.
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*/
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wait_for_completion_timeout(&cpu_running,
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msecs_to_jiffies(1000));
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if (!cpu_online(cpu)) {
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pr_crit("CPU%u: failed to come online\n", cpu);
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ret = -EIO;
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}
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} else {
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pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
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}
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memset(&secondary_data, 0, sizeof(secondary_data));
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return ret;
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}
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/* platform specific SMP operations */
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void __init smp_init_cpus(void)
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{
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if (smp_ops.smp_init_cpus)
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smp_ops.smp_init_cpus();
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}
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int platform_can_secondary_boot(void)
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{
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return !!smp_ops.smp_boot_secondary;
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}
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int platform_can_cpu_hotplug(void)
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{
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#ifdef CONFIG_HOTPLUG_CPU
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if (smp_ops.cpu_kill)
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return 1;
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#endif
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return 0;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int platform_cpu_kill(unsigned int cpu)
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{
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if (smp_ops.cpu_kill)
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return smp_ops.cpu_kill(cpu);
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return 1;
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}
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static int platform_cpu_disable(unsigned int cpu)
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{
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if (smp_ops.cpu_disable)
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return smp_ops.cpu_disable(cpu);
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return 0;
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}
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int platform_can_hotplug_cpu(unsigned int cpu)
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{
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/* cpu_die must be specified to support hotplug */
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if (!smp_ops.cpu_die)
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return 0;
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if (smp_ops.cpu_can_disable)
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return smp_ops.cpu_can_disable(cpu);
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/*
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* By default, allow disabling all CPUs except the first one,
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* since this is special on a lot of platforms, e.g. because
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* of clock tick interrupts.
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*/
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return cpu != 0;
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}
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static void ipi_teardown(int cpu)
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{
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int i;
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if (WARN_ON_ONCE(!ipi_irq_base))
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return;
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for (i = 0; i < nr_ipi; i++)
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disable_percpu_irq(ipi_irq_base + i);
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}
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/*
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* __cpu_disable runs on the processor to be shutdown.
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*/
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int __cpu_disable(void)
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{
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unsigned int cpu = smp_processor_id();
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int ret;
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ret = platform_cpu_disable(cpu);
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if (ret)
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return ret;
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#ifdef CONFIG_GENERIC_ARCH_TOPOLOGY
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remove_cpu_topology(cpu);
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#endif
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/*
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* Take this CPU offline. Once we clear this, we can't return,
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* and we must not schedule until we're ready to give up the cpu.
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*/
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set_cpu_online(cpu, false);
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ipi_teardown(cpu);
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/*
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* OK - migrate IRQs away from this CPU
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*/
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irq_migrate_all_off_this_cpu();
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/*
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* Flush user cache and TLB mappings, and then remove this CPU
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* from the vm mask set of all processes.
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*
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* Caches are flushed to the Level of Unification Inner Shareable
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* to write-back dirty lines to unified caches shared by all CPUs.
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*/
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flush_cache_louis();
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local_flush_tlb_all();
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return 0;
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}
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/*
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* called on the thread which is asking for a CPU to be shutdown -
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* waits until shutdown has completed, or it is timed out.
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*/
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void __cpu_die(unsigned int cpu)
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{
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if (!cpu_wait_death(cpu, 5)) {
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pr_err("CPU%u: cpu didn't die\n", cpu);
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return;
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}
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pr_debug("CPU%u: shutdown\n", cpu);
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clear_tasks_mm_cpumask(cpu);
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/*
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* platform_cpu_kill() is generally expected to do the powering off
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* and/or cutting of clocks to the dying CPU. Optionally, this may
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* be done by the CPU which is dying in preference to supporting
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* this call, but that means there is _no_ synchronisation between
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* the requesting CPU and the dying CPU actually losing power.
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*/
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if (!platform_cpu_kill(cpu))
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pr_err("CPU%u: unable to kill\n", cpu);
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}
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/*
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* Called from the idle thread for the CPU which has been shutdown.
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*
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* Note that we disable IRQs here, but do not re-enable them
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* before returning to the caller. This is also the behaviour
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* of the other hotplug-cpu capable cores, so presumably coming
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* out of idle fixes this.
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*/
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void arch_cpu_idle_dead(void)
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{
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unsigned int cpu = smp_processor_id();
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idle_task_exit();
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local_irq_disable();
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/*
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* Flush the data out of the L1 cache for this CPU. This must be
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* before the completion to ensure that data is safely written out
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* before platform_cpu_kill() gets called - which may disable
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* *this* CPU and power down its cache.
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*/
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flush_cache_louis();
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/*
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* Tell __cpu_die() that this CPU is now safe to dispose of. Once
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* this returns, power and/or clocks can be removed at any point
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* from this CPU and its cache by platform_cpu_kill().
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*/
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(void)cpu_report_death();
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/*
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* Ensure that the cache lines associated with that completion are
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* written out. This covers the case where _this_ CPU is doing the
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* powering down, to ensure that the completion is visible to the
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* CPU waiting for this one.
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*/
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flush_cache_louis();
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/*
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* The actual CPU shutdown procedure is at least platform (if not
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* CPU) specific. This may remove power, or it may simply spin.
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*
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* Platforms are generally expected *NOT* to return from this call,
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* although there are some which do because they have no way to
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* power down the CPU. These platforms are the _only_ reason we
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* have a return path which uses the fragment of assembly below.
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*
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* The return path should not be used for platforms which can
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* power off the CPU.
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*/
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if (smp_ops.cpu_die)
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smp_ops.cpu_die(cpu);
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pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
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cpu);
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/*
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* Do not return to the idle loop - jump back to the secondary
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* cpu initialisation. There's some initialisation which needs
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* to be repeated to undo the effects of taking the CPU offline.
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*/
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__asm__("mov sp, %0\n"
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" mov fp, #0\n"
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" b secondary_start_kernel"
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:
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: "r" (task_stack_page(current) + THREAD_SIZE - 8));
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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/*
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* Called by both boot and secondaries to move global data into
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* per-processor storage.
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*/
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static void smp_store_cpu_info(unsigned int cpuid)
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{
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struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
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cpu_info->loops_per_jiffy = loops_per_jiffy;
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cpu_info->cpuid = read_cpuid_id();
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store_cpu_topology(cpuid);
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check_cpu_icache_size(cpuid);
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}
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/*
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* This is the secondary CPU boot entry. We're using this CPUs
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* idle thread stack, but a set of temporary page tables.
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*/
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asmlinkage void secondary_start_kernel(void)
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{
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struct mm_struct *mm = &init_mm;
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unsigned int cpu;
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secondary_biglittle_init();
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/*
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* The identity mapping is uncached (strongly ordered), so
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* switch away from it before attempting any exclusive accesses.
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*/
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cpu_switch_mm(mm->pgd, mm);
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local_flush_bp_all();
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enter_lazy_tlb(mm, current);
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local_flush_tlb_all();
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/*
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* All kernel threads share the same mm context; grab a
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* reference and switch to it.
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*/
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cpu = smp_processor_id();
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mmgrab(mm);
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current->active_mm = mm;
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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cpu_init();
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#ifndef CONFIG_MMU
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setup_vectors_base();
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#endif
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pr_debug("CPU%u: Booted secondary processor\n", cpu);
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preempt_disable();
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trace_hardirqs_off();
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/*
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* Give the platform a chance to do its own initialisation.
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*/
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if (smp_ops.smp_secondary_init)
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smp_ops.smp_secondary_init(cpu);
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notify_cpu_starting(cpu);
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ipi_setup(cpu);
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calibrate_delay();
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smp_store_cpu_info(cpu);
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/*
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* OK, now it's safe to let the boot CPU continue. Wait for
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* the CPU migration code to notice that the CPU is online
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* before we continue - which happens after __cpu_up returns.
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*/
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set_cpu_online(cpu, true);
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check_other_bugs();
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complete(&cpu_running);
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local_irq_enable();
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local_fiq_enable();
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local_abt_enable();
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/*
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* OK, it's off to the idle thread for us
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*/
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cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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int cpu;
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unsigned long bogosum = 0;
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for_each_online_cpu(cpu)
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bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
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printk(KERN_INFO "SMP: Total of %d processors activated "
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"(%lu.%02lu BogoMIPS).\n",
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num_online_cpus(),
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bogosum / (500000/HZ),
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(bogosum / (5000/HZ)) % 100);
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hyp_mode_check();
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}
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void __init smp_prepare_boot_cpu(void)
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{
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set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
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}
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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unsigned int ncores = num_possible_cpus();
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init_cpu_topology();
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smp_store_cpu_info(smp_processor_id());
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/*
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* are we trying to boot more cores than exist?
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*/
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if (max_cpus > ncores)
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max_cpus = ncores;
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if (ncores > 1 && max_cpus) {
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/*
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* Initialise the present map, which describes the set of CPUs
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* actually populated at the present time. A platform should
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* re-initialize the map in the platforms smp_prepare_cpus()
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* if present != possible (e.g. physical hotplug).
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*/
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init_cpu_present(cpu_possible_mask);
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/*
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* Initialise the SCU if there are more than one CPU
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* and let them know where to start.
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*/
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if (smp_ops.smp_prepare_cpus)
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smp_ops.smp_prepare_cpus(max_cpus);
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}
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}
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static const char *ipi_types[NR_IPI] __tracepoint_string = {
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#define S(x,s) [x] = s
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S(IPI_WAKEUP, "CPU wakeup interrupts"),
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S(IPI_TIMER, "Timer broadcast interrupts"),
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S(IPI_RESCHEDULE, "Rescheduling interrupts"),
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S(IPI_CALL_FUNC, "Function call interrupts"),
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S(IPI_CPU_STOP, "CPU stop interrupts"),
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S(IPI_IRQ_WORK, "IRQ work interrupts"),
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S(IPI_COMPLETION, "completion interrupts"),
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};
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static void smp_cross_call(const struct cpumask *target, unsigned int ipinr);
|
|
|
|
void show_ipi_list(struct seq_file *p, int prec)
|
|
{
|
|
unsigned int cpu, i;
|
|
|
|
for (i = 0; i < NR_IPI; i++) {
|
|
unsigned int irq;
|
|
|
|
if (!ipi_desc[i])
|
|
continue;
|
|
|
|
irq = irq_desc_get_irq(ipi_desc[i]);
|
|
seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
|
|
|
|
for_each_online_cpu(cpu)
|
|
seq_printf(p, "%10u ", kstat_irqs_cpu(irq, cpu));
|
|
|
|
seq_printf(p, " %s\n", ipi_types[i]);
|
|
}
|
|
}
|
|
|
|
void arch_send_call_function_ipi_mask(const struct cpumask *mask)
|
|
{
|
|
smp_cross_call(mask, IPI_CALL_FUNC);
|
|
}
|
|
|
|
void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
|
|
{
|
|
smp_cross_call(mask, IPI_WAKEUP);
|
|
}
|
|
|
|
void arch_send_call_function_single_ipi(int cpu)
|
|
{
|
|
smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
|
|
}
|
|
|
|
#ifdef CONFIG_IRQ_WORK
|
|
void arch_irq_work_raise(void)
|
|
{
|
|
if (arch_irq_work_has_interrupt())
|
|
smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
|
|
void tick_broadcast(const struct cpumask *mask)
|
|
{
|
|
smp_cross_call(mask, IPI_TIMER);
|
|
}
|
|
#endif
|
|
|
|
static DEFINE_RAW_SPINLOCK(stop_lock);
|
|
|
|
/*
|
|
* ipi_cpu_stop - handle IPI from smp_send_stop()
|
|
*/
|
|
static void ipi_cpu_stop(unsigned int cpu)
|
|
{
|
|
if (system_state <= SYSTEM_RUNNING) {
|
|
raw_spin_lock(&stop_lock);
|
|
pr_crit("CPU%u: stopping\n", cpu);
|
|
dump_stack();
|
|
raw_spin_unlock(&stop_lock);
|
|
}
|
|
|
|
set_cpu_online(cpu, false);
|
|
|
|
local_fiq_disable();
|
|
local_irq_disable();
|
|
|
|
while (1) {
|
|
cpu_relax();
|
|
wfe();
|
|
}
|
|
}
|
|
|
|
static DEFINE_PER_CPU(struct completion *, cpu_completion);
|
|
|
|
int register_ipi_completion(struct completion *completion, int cpu)
|
|
{
|
|
per_cpu(cpu_completion, cpu) = completion;
|
|
return IPI_COMPLETION;
|
|
}
|
|
|
|
static void ipi_complete(unsigned int cpu)
|
|
{
|
|
complete(per_cpu(cpu_completion, cpu));
|
|
}
|
|
|
|
/*
|
|
* Main handler for inter-processor interrupts
|
|
*/
|
|
asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
|
|
{
|
|
handle_IPI(ipinr, regs);
|
|
}
|
|
|
|
static void do_handle_IPI(int ipinr)
|
|
{
|
|
unsigned int cpu = smp_processor_id();
|
|
|
|
if ((unsigned)ipinr < NR_IPI)
|
|
trace_ipi_entry_rcuidle(ipi_types[ipinr]);
|
|
|
|
switch (ipinr) {
|
|
case IPI_WAKEUP:
|
|
break;
|
|
|
|
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
|
|
case IPI_TIMER:
|
|
tick_receive_broadcast();
|
|
break;
|
|
#endif
|
|
|
|
case IPI_RESCHEDULE:
|
|
scheduler_ipi();
|
|
break;
|
|
|
|
case IPI_CALL_FUNC:
|
|
generic_smp_call_function_interrupt();
|
|
break;
|
|
|
|
case IPI_CPU_STOP:
|
|
ipi_cpu_stop(cpu);
|
|
break;
|
|
|
|
#ifdef CONFIG_IRQ_WORK
|
|
case IPI_IRQ_WORK:
|
|
irq_work_run();
|
|
break;
|
|
#endif
|
|
|
|
case IPI_COMPLETION:
|
|
ipi_complete(cpu);
|
|
break;
|
|
|
|
case IPI_CPU_BACKTRACE:
|
|
printk_nmi_enter();
|
|
nmi_cpu_backtrace(get_irq_regs());
|
|
printk_nmi_exit();
|
|
break;
|
|
|
|
default:
|
|
pr_crit("CPU%u: Unknown IPI message 0x%x\n",
|
|
cpu, ipinr);
|
|
break;
|
|
}
|
|
|
|
if ((unsigned)ipinr < NR_IPI)
|
|
trace_ipi_exit_rcuidle(ipi_types[ipinr]);
|
|
}
|
|
|
|
/* Legacy version, should go away once all irqchips have been converted */
|
|
void handle_IPI(int ipinr, struct pt_regs *regs)
|
|
{
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
|
|
irq_enter();
|
|
do_handle_IPI(ipinr);
|
|
irq_exit();
|
|
|
|
set_irq_regs(old_regs);
|
|
}
|
|
|
|
static irqreturn_t ipi_handler(int irq, void *data)
|
|
{
|
|
do_handle_IPI(irq - ipi_irq_base);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
|
|
{
|
|
trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
|
|
__ipi_send_mask(ipi_desc[ipinr], target);
|
|
}
|
|
|
|
static void ipi_setup(int cpu)
|
|
{
|
|
int i;
|
|
|
|
if (WARN_ON_ONCE(!ipi_irq_base))
|
|
return;
|
|
|
|
for (i = 0; i < nr_ipi; i++)
|
|
enable_percpu_irq(ipi_irq_base + i, 0);
|
|
}
|
|
|
|
void __init set_smp_ipi_range(int ipi_base, int n)
|
|
{
|
|
int i;
|
|
|
|
WARN_ON(n < MAX_IPI);
|
|
nr_ipi = min(n, MAX_IPI);
|
|
|
|
for (i = 0; i < nr_ipi; i++) {
|
|
int err;
|
|
|
|
err = request_percpu_irq(ipi_base + i, ipi_handler,
|
|
"IPI", &irq_stat);
|
|
WARN_ON(err);
|
|
|
|
ipi_desc[i] = irq_to_desc(ipi_base + i);
|
|
irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
|
|
}
|
|
|
|
ipi_irq_base = ipi_base;
|
|
|
|
/* Setup the boot CPU immediately */
|
|
ipi_setup(smp_processor_id());
|
|
}
|
|
|
|
void smp_send_reschedule(int cpu)
|
|
{
|
|
smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
|
|
}
|
|
|
|
void smp_send_stop(void)
|
|
{
|
|
unsigned long timeout;
|
|
struct cpumask mask;
|
|
|
|
cpumask_copy(&mask, cpu_online_mask);
|
|
cpumask_clear_cpu(smp_processor_id(), &mask);
|
|
if (!cpumask_empty(&mask))
|
|
smp_cross_call(&mask, IPI_CPU_STOP);
|
|
|
|
/* Wait up to one second for other CPUs to stop */
|
|
timeout = USEC_PER_SEC;
|
|
while (num_online_cpus() > 1 && timeout--)
|
|
udelay(1);
|
|
|
|
if (num_online_cpus() > 1)
|
|
pr_warn("SMP: failed to stop secondary CPUs\n");
|
|
}
|
|
|
|
/* In case panic() and panic() called at the same time on CPU1 and CPU2,
|
|
* and CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop()
|
|
* CPU1 can't receive the ipi irqs from CPU2, CPU1 will be always online,
|
|
* kdump fails. So split out the panic_smp_self_stop() and add
|
|
* set_cpu_online(smp_processor_id(), false).
|
|
*/
|
|
void panic_smp_self_stop(void)
|
|
{
|
|
pr_debug("CPU %u will stop doing anything useful since another CPU has paniced\n",
|
|
smp_processor_id());
|
|
set_cpu_online(smp_processor_id(), false);
|
|
while (1)
|
|
cpu_relax();
|
|
}
|
|
|
|
/*
|
|
* not supported here
|
|
*/
|
|
int setup_profiling_timer(unsigned int multiplier)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
|
|
static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
|
|
static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
|
|
static unsigned long global_l_p_j_ref;
|
|
static unsigned long global_l_p_j_ref_freq;
|
|
|
|
static int cpufreq_callback(struct notifier_block *nb,
|
|
unsigned long val, void *data)
|
|
{
|
|
struct cpufreq_freqs *freq = data;
|
|
struct cpumask *cpus = freq->policy->cpus;
|
|
int cpu, first = cpumask_first(cpus);
|
|
unsigned int lpj;
|
|
|
|
if (freq->flags & CPUFREQ_CONST_LOOPS)
|
|
return NOTIFY_OK;
|
|
|
|
if (!per_cpu(l_p_j_ref, first)) {
|
|
for_each_cpu(cpu, cpus) {
|
|
per_cpu(l_p_j_ref, cpu) =
|
|
per_cpu(cpu_data, cpu).loops_per_jiffy;
|
|
per_cpu(l_p_j_ref_freq, cpu) = freq->old;
|
|
}
|
|
|
|
if (!global_l_p_j_ref) {
|
|
global_l_p_j_ref = loops_per_jiffy;
|
|
global_l_p_j_ref_freq = freq->old;
|
|
}
|
|
}
|
|
|
|
if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
|
|
(val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
|
|
loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
|
|
global_l_p_j_ref_freq,
|
|
freq->new);
|
|
|
|
lpj = cpufreq_scale(per_cpu(l_p_j_ref, first),
|
|
per_cpu(l_p_j_ref_freq, first), freq->new);
|
|
for_each_cpu(cpu, cpus)
|
|
per_cpu(cpu_data, cpu).loops_per_jiffy = lpj;
|
|
}
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
static struct notifier_block cpufreq_notifier = {
|
|
.notifier_call = cpufreq_callback,
|
|
};
|
|
|
|
static int __init register_cpufreq_notifier(void)
|
|
{
|
|
return cpufreq_register_notifier(&cpufreq_notifier,
|
|
CPUFREQ_TRANSITION_NOTIFIER);
|
|
}
|
|
core_initcall(register_cpufreq_notifier);
|
|
|
|
#endif
|
|
|
|
static void raise_nmi(cpumask_t *mask)
|
|
{
|
|
__ipi_send_mask(ipi_desc[IPI_CPU_BACKTRACE], mask);
|
|
}
|
|
|
|
void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
|
|
{
|
|
nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_nmi);
|
|
}
|