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f58945392a
Use a better name for the USB PHY clock. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
77 lines
1.2 KiB
Plaintext
77 lines
1.2 KiB
Plaintext
* Clock bindings for Freescale i.MX23
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Required properties:
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- compatible: Should be "fsl,imx23-clkctrl"
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- reg: Address and length of the register set
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- #clock-cells: Should be <1>
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The clock consumer should specify the desired clock by having the clock
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ID in its "clocks" phandle cell. The following is a full list of i.MX23
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clocks and IDs.
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Clock ID
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------------------
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ref_xtal 0
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pll 1
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ref_cpu 2
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ref_emi 3
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ref_pix 4
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ref_io 5
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saif_sel 6
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lcdif_sel 7
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gpmi_sel 8
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ssp_sel 9
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emi_sel 10
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cpu 11
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etm_sel 12
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cpu_pll 13
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cpu_xtal 14
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hbus 15
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xbus 16
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lcdif_div 17
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ssp_div 18
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gpmi_div 19
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emi_pll 20
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emi_xtal 21
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etm_div 22
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saif_div 23
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clk32k_div 24
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rtc 25
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adc 26
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spdif_div 27
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clk32k 28
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dri 29
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pwm 30
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filt 31
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uart 32
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ssp 33
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gpmi 34
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spdif 35
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emi 36
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saif 37
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lcdif 38
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etm 39
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usb 40
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usb_phy 41
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Examples:
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clks: clkctrl@80040000 {
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compatible = "fsl,imx23-clkctrl";
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reg = <0x80040000 0x2000>;
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#clock-cells = <1>;
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clock-output-names =
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...
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"uart", /* 32 */
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...
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"end_of_list";
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};
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auart0: serial@8006c000 {
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compatible = "fsl,imx23-auart";
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reg = <0x8006c000 0x2000>;
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interrupts = <24 25 23>;
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clocks = <&clks 32>;
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status = "disabled";
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};
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