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7f4b04614a
Currently cpufreq frequency table has two fields: frequency and driver_data. driver_data is only for drivers' internal use and cpufreq core shouldn't use it at all. But with the introduction of BOOST frequencies, this assumption was broken and we started using it as a flag instead. There are two problems due to this: - It is against the description of this field, as driver's data is used by the core now. - if drivers fill it with -3 for any frequency, then those frequencies are never considered by cpufreq core as it is exactly same as value of CPUFREQ_BOOST_FREQ, i.e. ~2. The best way to get this fixed is by creating another field flags which will be used for such flags. This patch does that. Along with that various drivers need modifications due to the change of struct cpufreq_frequency_table. Reviewed-by: Gautham R Shenoy <ego@linux.vnet.ibm.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
233 lines
5.5 KiB
C
233 lines
5.5 KiB
C
/*
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* Copyright 2009 Wolfson Microelectronics plc
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*
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* S3C64xx CPUfreq Support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define pr_fmt(fmt) "cpufreq: " fmt
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/cpufreq.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/regulator/consumer.h>
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#include <linux/module.h>
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static struct regulator *vddarm;
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static unsigned long regulator_latency;
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#ifdef CONFIG_CPU_S3C6410
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struct s3c64xx_dvfs {
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unsigned int vddarm_min;
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unsigned int vddarm_max;
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};
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static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = {
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[0] = { 1000000, 1150000 },
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[1] = { 1050000, 1150000 },
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[2] = { 1100000, 1150000 },
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[3] = { 1200000, 1350000 },
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[4] = { 1300000, 1350000 },
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};
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static struct cpufreq_frequency_table s3c64xx_freq_table[] = {
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{ 0, 0, 66000 },
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{ 0, 0, 100000 },
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{ 0, 0, 133000 },
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{ 0, 1, 200000 },
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{ 0, 1, 222000 },
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{ 0, 1, 266000 },
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{ 0, 2, 333000 },
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{ 0, 2, 400000 },
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{ 0, 2, 532000 },
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{ 0, 2, 533000 },
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{ 0, 3, 667000 },
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{ 0, 4, 800000 },
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{ 0, 0, CPUFREQ_TABLE_END },
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};
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#endif
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static int s3c64xx_cpufreq_set_target(struct cpufreq_policy *policy,
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unsigned int index)
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{
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struct s3c64xx_dvfs *dvfs;
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unsigned int old_freq, new_freq;
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int ret;
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old_freq = clk_get_rate(policy->clk) / 1000;
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new_freq = s3c64xx_freq_table[index].frequency;
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dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[index].driver_data];
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#ifdef CONFIG_REGULATOR
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if (vddarm && new_freq > old_freq) {
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ret = regulator_set_voltage(vddarm,
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dvfs->vddarm_min,
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dvfs->vddarm_max);
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if (ret != 0) {
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pr_err("Failed to set VDDARM for %dkHz: %d\n",
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new_freq, ret);
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return ret;
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}
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}
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#endif
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ret = clk_set_rate(policy->clk, new_freq * 1000);
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if (ret < 0) {
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pr_err("Failed to set rate %dkHz: %d\n",
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new_freq, ret);
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return ret;
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}
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#ifdef CONFIG_REGULATOR
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if (vddarm && new_freq < old_freq) {
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ret = regulator_set_voltage(vddarm,
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dvfs->vddarm_min,
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dvfs->vddarm_max);
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if (ret != 0) {
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pr_err("Failed to set VDDARM for %dkHz: %d\n",
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new_freq, ret);
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if (clk_set_rate(policy->clk, old_freq * 1000) < 0)
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pr_err("Failed to restore original clock rate\n");
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return ret;
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}
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}
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#endif
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pr_debug("Set actual frequency %lukHz\n",
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clk_get_rate(policy->clk) / 1000);
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return 0;
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}
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#ifdef CONFIG_REGULATOR
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static void __init s3c64xx_cpufreq_config_regulator(void)
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{
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int count, v, i, found;
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struct cpufreq_frequency_table *freq;
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struct s3c64xx_dvfs *dvfs;
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count = regulator_count_voltages(vddarm);
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if (count < 0) {
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pr_err("Unable to check supported voltages\n");
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}
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freq = s3c64xx_freq_table;
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while (count > 0 && freq->frequency != CPUFREQ_TABLE_END) {
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if (freq->frequency == CPUFREQ_ENTRY_INVALID)
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continue;
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dvfs = &s3c64xx_dvfs_table[freq->driver_data];
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found = 0;
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for (i = 0; i < count; i++) {
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v = regulator_list_voltage(vddarm, i);
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if (v >= dvfs->vddarm_min && v <= dvfs->vddarm_max)
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found = 1;
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}
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if (!found) {
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pr_debug("%dkHz unsupported by regulator\n",
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freq->frequency);
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freq->frequency = CPUFREQ_ENTRY_INVALID;
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}
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freq++;
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}
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/* Guess based on having to do an I2C/SPI write; in future we
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* will be able to query the regulator performance here. */
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regulator_latency = 1 * 1000 * 1000;
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}
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#endif
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static int s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy)
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{
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int ret;
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struct cpufreq_frequency_table *freq;
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if (policy->cpu != 0)
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return -EINVAL;
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if (s3c64xx_freq_table == NULL) {
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pr_err("No frequency information for this CPU\n");
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return -ENODEV;
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}
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policy->clk = clk_get(NULL, "armclk");
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if (IS_ERR(policy->clk)) {
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pr_err("Unable to obtain ARMCLK: %ld\n",
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PTR_ERR(policy->clk));
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return PTR_ERR(policy->clk);
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}
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#ifdef CONFIG_REGULATOR
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vddarm = regulator_get(NULL, "vddarm");
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if (IS_ERR(vddarm)) {
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ret = PTR_ERR(vddarm);
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pr_err("Failed to obtain VDDARM: %d\n", ret);
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pr_err("Only frequency scaling available\n");
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vddarm = NULL;
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} else {
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s3c64xx_cpufreq_config_regulator();
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}
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#endif
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freq = s3c64xx_freq_table;
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while (freq->frequency != CPUFREQ_TABLE_END) {
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unsigned long r;
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/* Check for frequencies we can generate */
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r = clk_round_rate(policy->clk, freq->frequency * 1000);
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r /= 1000;
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if (r != freq->frequency) {
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pr_debug("%dkHz unsupported by clock\n",
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freq->frequency);
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freq->frequency = CPUFREQ_ENTRY_INVALID;
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}
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/* If we have no regulator then assume startup
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* frequency is the maximum we can support. */
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if (!vddarm && freq->frequency > clk_get_rate(policy->clk) / 1000)
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freq->frequency = CPUFREQ_ENTRY_INVALID;
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freq++;
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}
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/* Datasheet says PLL stabalisation time (if we were to use
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* the PLLs, which we don't currently) is ~300us worst case,
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* but add some fudge.
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*/
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ret = cpufreq_generic_init(policy, s3c64xx_freq_table,
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(500 * 1000) + regulator_latency);
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if (ret != 0) {
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pr_err("Failed to configure frequency table: %d\n",
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ret);
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regulator_put(vddarm);
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clk_put(policy->clk);
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}
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return ret;
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}
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static struct cpufreq_driver s3c64xx_cpufreq_driver = {
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = s3c64xx_cpufreq_set_target,
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.get = cpufreq_generic_get,
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.init = s3c64xx_cpufreq_driver_init,
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.name = "s3c",
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};
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static int __init s3c64xx_cpufreq_init(void)
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{
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return cpufreq_register_driver(&s3c64xx_cpufreq_driver);
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}
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module_init(s3c64xx_cpufreq_init);
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