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81d7cac4d1
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> [mpe: Fixup maple/setup.c which needs platform_device] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230724210247.778034-1-robh@kernel.org
170 lines
3.8 KiB
C
170 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* GE SBC610 board support
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*
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* Author: Martyn Welch <martyn.welch@ge.com>
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*
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* Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
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*
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* Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
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* Copyright 2006 Freescale Semiconductor Inc.
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*
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* NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <asm/nvram.h>
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#include <sysdev/fsl_pci.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/ge/ge_pic.h>
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#include "mpc86xx.h"
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#undef DEBUG
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#ifdef DEBUG
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#define DBG (fmt...) do { printk(KERN_ERR "SBC610: " fmt); } while (0)
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#else
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#define DBG (fmt...) do { } while (0)
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#endif
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void __iomem *sbc610_regs;
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static void __init gef_sbc610_init_irq(void)
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{
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struct device_node *cascade_node = NULL;
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mpc86xx_init_irq();
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/*
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* There is a simple interrupt handler in the main FPGA, this needs
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* to be cascaded into the MPIC
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*/
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cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
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if (!cascade_node) {
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printk(KERN_WARNING "SBC610: No FPGA PIC\n");
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return;
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}
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gef_pic_init(cascade_node);
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of_node_put(cascade_node);
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}
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static void __init gef_sbc610_setup_arch(void)
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{
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struct device_node *regs;
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printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
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#ifdef CONFIG_SMP
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mpc86xx_smp_init();
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#endif
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fsl_pci_assign_primary();
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/* Remap basic board registers */
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regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
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if (regs) {
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sbc610_regs = of_iomap(regs, 0);
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if (sbc610_regs == NULL)
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printk(KERN_WARNING "Unable to map board registers\n");
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of_node_put(regs);
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}
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#if defined(CONFIG_MMIO_NVRAM)
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mmio_nvram_init();
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#endif
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}
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/* Return the PCB revision */
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static unsigned int gef_sbc610_get_pcb_rev(void)
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{
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unsigned int reg;
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reg = ioread32(sbc610_regs);
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return (reg >> 8) & 0xff;
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}
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/* Return the board (software) revision */
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static unsigned int gef_sbc610_get_board_rev(void)
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{
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unsigned int reg;
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reg = ioread32(sbc610_regs);
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return (reg >> 16) & 0xff;
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}
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/* Return the FPGA revision */
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static unsigned int gef_sbc610_get_fpga_rev(void)
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{
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unsigned int reg;
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reg = ioread32(sbc610_regs);
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return (reg >> 24) & 0xf;
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}
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static void gef_sbc610_show_cpuinfo(struct seq_file *m)
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{
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uint svid = mfspr(SPRN_SVR);
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seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
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seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
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('A' + gef_sbc610_get_board_rev() - 1));
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seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc610_get_fpga_rev());
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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}
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static void gef_sbc610_nec_fixup(struct pci_dev *pdev)
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{
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unsigned int val;
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/* Do not do the fixup on other platforms! */
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if (!machine_is(gef_sbc610))
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return;
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printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
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/* Ensure ports 1, 2, 3, 4 & 5 are enabled */
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pci_read_config_dword(pdev, 0xe0, &val);
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pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5);
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/* System clock is 48-MHz Oscillator and EHCI Enabled. */
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pci_write_config_dword(pdev, 0xe4, 1 << 5);
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
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gef_sbc610_nec_fixup);
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machine_arch_initcall(gef_sbc610, mpc86xx_common_publish_devices);
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define_machine(gef_sbc610) {
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.name = "GE SBC610",
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.compatible = "gef,sbc610",
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.setup_arch = gef_sbc610_setup_arch,
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.init_IRQ = gef_sbc610_init_irq,
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.show_cpuinfo = gef_sbc610_show_cpuinfo,
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.get_irq = mpic_get_irq,
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.time_init = mpc86xx_time_init,
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.progress = udbg_progress,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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};
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