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The 25 MHz reference clock has better stability so its use is prefered over the core clock. Change the Armada 375 clock initialization to use this reference clock. To ensure the driver is compatible with an old devicetree, also provide a fallback path which will silently return to the previous behavior. While here, add the clock specification to the binding documentation. Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Wim Van Sebroeck <wim@iguana.be> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
47 lines
1.3 KiB
Plaintext
47 lines
1.3 KiB
Plaintext
* Marvell Orion Watchdog Time
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Required Properties:
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- Compatibility : "marvell,orion-wdt"
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"marvell,armada-370-wdt"
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"marvell,armada-xp-wdt"
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"marvell,armada-375-wdt"
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"marvell,armada-380-wdt"
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- reg : Should contain two entries: first one with the
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timer control address, second one with the
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rstout enable address.
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For "marvell,armada-375-wdt" and "marvell,armada-380-wdt":
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- reg : A third entry is mandatory and should contain the
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shared mask/unmask RSTOUT address.
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Clocks required for compatibles = "marvell,orion-wdt",
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"marvell,armada-370-wdt":
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- clocks : Must contain a single entry describing the clock input
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Clocks required for compatibles = "marvell,armada-xp-wdt"
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"marvell,armada-375-wdt"
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"marvell,armada-380-wdt":
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- clocks : Must contain an entry for each entry in clock-names.
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- clock-names : Must include the following entries:
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"nbclk" (L2/coherency fabric clock),
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"fixed" (Reference 25 MHz fixed-clock).
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Optional properties:
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- interrupts : Contains the IRQ for watchdog expiration
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- timeout-sec : Contains the watchdog timeout in seconds
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Example:
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wdt@20300 {
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compatible = "marvell,orion-wdt";
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reg = <0x20300 0x28>, <0x20108 0x4>;
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interrupts = <3>;
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timeout-sec = <10>;
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status = "okay";
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clocks = <&gate_clk 7>;
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};
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