Yi Li eb7bd9c461 Blackfin: cleanup sync handling when enabling/disabling cplbs ... The handling of updating the [DI]MEM_CONTROL MMRs does not follow proper sync procedures as laid out in the Blackfin programming manual. So rather than audit/fix every call location, create helper functions that do the right things in order to safely update these MMRs. Then convert all call sites to use these new helper functions. While we're fixing the code, drop the workaround for anomaly 05000125 as that anomaly applies to old versions of silicon that we do not support. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>		2009-09-16 22:10:19 -04:00
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cacheinit.c	Blackfin: cleanup sync handling when enabling/disabling cplbs	2009-09-16 22:10:19 -04:00
cplbinit.c	Blackfin: add CPLB entries for Core B on-chip L1 SRAM regions	2009-07-16 01:52:51 -04:00
cplbmgr.c	Blackfin: cleanup sync handling when enabling/disabling cplbs	2009-09-16 22:10:19 -04:00
Makefile	Blackfin arch: Faster C implementation of no-MPU CPLB handler	2009-01-07 23:14:38 +08:00