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2e618261c9
Helper function for updating nand platform data has been added the capability to take timing structure arguement. Usage of omap_nand_flash_init() has been replaced by modifed one, omap_nand_flash_init was doing things similar to board_nand_init except that NAND CS# were being acquired based on bootloader setting. As CS# is hardwired for a given board, acquiring gpmc CS# has been removed, and updated with the value on board. NAND CS# used in beagle board & omap3evm was found to be CS0. Thomas Weber <thomas.weber.linux@googlemail.com> reported that value of devkit8000 to be CS0. Overo board was found to be using CS0 based on u-boot, while google grep says omap3touchbook too has CS0. Signed-off-by: Afzal Mohammed <afzal@ti.com> Reviewed-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
761 lines
21 KiB
C
761 lines
21 KiB
C
/*
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* linux/arch/arm/mach-omap2/board-omap3evm.c
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*
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* Copyright (C) 2008 Texas Instruments
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*
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* Modified from mach-omap2/board-3430sdp.c
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*
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* Initial code: Syed Mohammed Khasim
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/gpio.h>
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#include <linux/input.h>
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#include <linux/input/matrix_keypad.h>
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#include <linux/leds.h>
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#include <linux/interrupt.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/nand.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/ads7846.h>
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#include <linux/i2c/twl.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/nop-usb-xceiv.h>
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#include <linux/smsc911x.h>
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#include <linux/wl12xx.h>
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#include <linux/regulator/fixed.h>
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#include <linux/regulator/machine.h>
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#include <linux/mmc/host.h>
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#include <linux/export.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <plat/usb.h>
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#include <linux/platform_data/mtd-nand-omap2.h>
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#include "common.h"
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <video/omapdss.h>
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#include <video/omap-panel-tfp410.h>
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#include "mux.h"
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#include "sdram-micron-mt46h32m32lf-6.h"
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#include "hsmmc.h"
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#include "common-board-devices.h"
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#include "board-flash.h"
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#define NAND_CS 0
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#define OMAP3_EVM_TS_GPIO 175
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#define OMAP3_EVM_EHCI_VBUS 22
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#define OMAP3_EVM_EHCI_SELECT 61
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#define OMAP3EVM_ETHR_START 0x2c000000
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#define OMAP3EVM_ETHR_SIZE 1024
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#define OMAP3EVM_ETHR_ID_REV 0x50
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#define OMAP3EVM_ETHR_GPIO_IRQ 176
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#define OMAP3EVM_SMSC911X_CS 5
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/*
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* Eth Reset signal
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* 64 = Generation 1 (<=RevD)
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* 7 = Generation 2 (>=RevE)
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*/
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#define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
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#define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
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/*
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* OMAP35x EVM revision
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* Run time detection of EVM revision is done by reading Ethernet
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* PHY ID -
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* GEN_1 = 0x01150000
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* GEN_2 = 0x92200000
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*/
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enum {
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OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
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OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
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};
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static u8 omap3_evm_version;
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static u8 get_omap3_evm_rev(void)
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{
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return omap3_evm_version;
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}
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static void __init omap3_evm_get_revision(void)
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{
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void __iomem *ioaddr;
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unsigned int smsc_id;
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/* Ethernet PHY ID is stored at ID_REV register */
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ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
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if (!ioaddr)
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return;
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smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
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iounmap(ioaddr);
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switch (smsc_id) {
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/*SMSC9115 chipset*/
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case 0x01150000:
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omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
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break;
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/*SMSC 9220 chipset*/
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case 0x92200000:
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default:
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omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
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}
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}
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#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
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#include "gpmc-smsc911x.h"
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static struct omap_smsc911x_platform_data smsc911x_cfg = {
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.cs = OMAP3EVM_SMSC911X_CS,
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.gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
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.gpio_reset = -EINVAL,
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.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
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};
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static inline void __init omap3evm_init_smsc911x(void)
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{
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/* Configure ethernet controller reset gpio */
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if (cpu_is_omap3430()) {
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if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
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smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
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else
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smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
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}
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gpmc_smsc911x_init(&smsc911x_cfg);
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}
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#else
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static inline void __init omap3evm_init_smsc911x(void) { return; }
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#endif
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/*
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* OMAP3EVM LCD Panel control signals
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*/
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#define OMAP3EVM_LCD_PANEL_LR 2
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#define OMAP3EVM_LCD_PANEL_UD 3
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#define OMAP3EVM_LCD_PANEL_INI 152
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#define OMAP3EVM_LCD_PANEL_ENVDD 153
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#define OMAP3EVM_LCD_PANEL_QVGA 154
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#define OMAP3EVM_LCD_PANEL_RESB 155
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#define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
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#define OMAP3EVM_DVI_PANEL_EN_GPIO 199
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static struct gpio omap3_evm_dss_gpios[] __initdata = {
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{ OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" },
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{ OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" },
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{ OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" },
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{ OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" },
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{ OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" },
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{ OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" },
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};
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static int lcd_enabled;
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static int dvi_enabled;
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static void __init omap3_evm_display_init(void)
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{
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int r;
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r = gpio_request_array(omap3_evm_dss_gpios,
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ARRAY_SIZE(omap3_evm_dss_gpios));
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if (r)
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printk(KERN_ERR "failed to get lcd_panel_* gpios\n");
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}
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static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev)
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{
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if (dvi_enabled) {
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printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
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return -EINVAL;
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}
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gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0);
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if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
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gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
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else
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gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
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lcd_enabled = 1;
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return 0;
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}
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static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev)
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{
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gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1);
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if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
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gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
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else
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gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
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lcd_enabled = 0;
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}
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static struct omap_dss_device omap3_evm_lcd_device = {
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.name = "lcd",
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.driver_name = "sharp_ls_panel",
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.type = OMAP_DISPLAY_TYPE_DPI,
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.phy.dpi.data_lines = 18,
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.platform_enable = omap3_evm_enable_lcd,
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.platform_disable = omap3_evm_disable_lcd,
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};
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static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
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{
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return 0;
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}
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static void omap3_evm_disable_tv(struct omap_dss_device *dssdev)
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{
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}
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static struct omap_dss_device omap3_evm_tv_device = {
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.name = "tv",
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.driver_name = "venc",
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.type = OMAP_DISPLAY_TYPE_VENC,
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.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
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.platform_enable = omap3_evm_enable_tv,
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.platform_disable = omap3_evm_disable_tv,
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};
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static struct tfp410_platform_data dvi_panel = {
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.power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO,
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};
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static struct omap_dss_device omap3_evm_dvi_device = {
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.name = "dvi",
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.type = OMAP_DISPLAY_TYPE_DPI,
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.driver_name = "tfp410",
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.data = &dvi_panel,
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.phy.dpi.data_lines = 24,
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};
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static struct omap_dss_device *omap3_evm_dss_devices[] = {
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&omap3_evm_lcd_device,
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&omap3_evm_tv_device,
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&omap3_evm_dvi_device,
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};
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static struct omap_dss_board_info omap3_evm_dss_data = {
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.num_devices = ARRAY_SIZE(omap3_evm_dss_devices),
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.devices = omap3_evm_dss_devices,
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.default_device = &omap3_evm_lcd_device,
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};
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static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
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REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
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};
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static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
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REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
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};
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/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
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static struct regulator_init_data omap3evm_vmmc1 = {
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.constraints = {
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.min_uV = 1850000,
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.max_uV = 3150000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
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.consumer_supplies = omap3evm_vmmc1_supply,
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};
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/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
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static struct regulator_init_data omap3evm_vsim = {
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.constraints = {
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.min_uV = 1800000,
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.max_uV = 3000000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
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.consumer_supplies = omap3evm_vsim_supply,
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};
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static struct omap2_hsmmc_info mmc[] = {
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{
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.mmc = 1,
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.caps = MMC_CAP_4_BIT_DATA,
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.gpio_cd = -EINVAL,
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.gpio_wp = 63,
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.deferred = true,
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},
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#ifdef CONFIG_WL12XX_PLATFORM_DATA
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{
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.name = "wl1271",
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.mmc = 2,
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.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
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.gpio_wp = -EINVAL,
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.gpio_cd = -EINVAL,
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.nonremovable = true,
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},
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#endif
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{} /* Terminator */
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};
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static struct gpio_led gpio_leds[] = {
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{
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.name = "omap3evm::ledb",
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/* normally not visible (board underside) */
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.default_trigger = "default-on",
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.gpio = -EINVAL, /* gets replaced */
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.active_low = true,
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},
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};
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static struct gpio_led_platform_data gpio_led_info = {
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.leds = gpio_leds,
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.num_leds = ARRAY_SIZE(gpio_leds),
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};
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static struct platform_device leds_gpio = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &gpio_led_info,
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},
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};
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static int omap3evm_twl_gpio_setup(struct device *dev,
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unsigned gpio, unsigned ngpio)
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{
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int r, lcd_bl_en;
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/* gpio + 0 is "mmc0_cd" (input/IRQ) */
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mmc[0].gpio_cd = gpio + 0;
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omap_hsmmc_late_init(mmc);
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/*
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* Most GPIOs are for USB OTG. Some are mostly sent to
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* the P2 connector; notably LEDA for the LCD backlight.
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*/
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/* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
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lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
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GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
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r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
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if (r)
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printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
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/* gpio + 7 == DVI Enable */
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gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
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/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
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gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
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platform_device_register(&leds_gpio);
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/* Enable VBUS switch by setting TWL4030.GPIO2DIR as output
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* for starting USB tranceiver
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*/
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#ifdef CONFIG_TWL4030_CORE
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if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
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u8 val;
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twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1);
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val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */
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twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1);
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}
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#endif
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return 0;
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}
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static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
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.use_leds = true,
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.setup = omap3evm_twl_gpio_setup,
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};
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static uint32_t board_keymap[] = {
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KEY(0, 0, KEY_LEFT),
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KEY(0, 1, KEY_DOWN),
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KEY(0, 2, KEY_ENTER),
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KEY(0, 3, KEY_M),
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KEY(1, 0, KEY_RIGHT),
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KEY(1, 1, KEY_UP),
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KEY(1, 2, KEY_I),
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KEY(1, 3, KEY_N),
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KEY(2, 0, KEY_A),
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KEY(2, 1, KEY_E),
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KEY(2, 2, KEY_J),
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KEY(2, 3, KEY_O),
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KEY(3, 0, KEY_B),
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KEY(3, 1, KEY_F),
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KEY(3, 2, KEY_K),
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KEY(3, 3, KEY_P)
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};
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static struct matrix_keymap_data board_map_data = {
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.keymap = board_keymap,
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.keymap_size = ARRAY_SIZE(board_keymap),
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};
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static struct twl4030_keypad_data omap3evm_kp_data = {
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.keymap_data = &board_map_data,
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.rows = 4,
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.cols = 4,
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.rep = 1,
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};
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/* ads7846 on SPI */
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static struct regulator_consumer_supply omap3evm_vio_supply[] = {
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REGULATOR_SUPPLY("vcc", "spi1.0"),
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};
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/* VIO for ads7846 */
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static struct regulator_init_data omap3evm_vio = {
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.constraints = {
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.min_uV = 1800000,
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.max_uV = 1800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
|
|
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
|
| REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
|
|
.consumer_supplies = omap3evm_vio_supply,
|
|
};
|
|
|
|
#ifdef CONFIG_WL12XX_PLATFORM_DATA
|
|
|
|
#define OMAP3EVM_WLAN_PMENA_GPIO (150)
|
|
#define OMAP3EVM_WLAN_IRQ_GPIO (149)
|
|
|
|
static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
|
|
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
|
};
|
|
|
|
/* VMMC2 for driving the WL12xx module */
|
|
static struct regulator_init_data omap3evm_vmmc2 = {
|
|
.constraints = {
|
|
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
|
|
.consumer_supplies = omap3evm_vmmc2_supply,
|
|
};
|
|
|
|
static struct fixed_voltage_config omap3evm_vwlan = {
|
|
.supply_name = "vwl1271",
|
|
.microvolts = 1800000, /* 1.80V */
|
|
.gpio = OMAP3EVM_WLAN_PMENA_GPIO,
|
|
.startup_delay = 70000, /* 70ms */
|
|
.enable_high = 1,
|
|
.enabled_at_boot = 0,
|
|
.init_data = &omap3evm_vmmc2,
|
|
};
|
|
|
|
static struct platform_device omap3evm_wlan_regulator = {
|
|
.name = "reg-fixed-voltage",
|
|
.id = 1,
|
|
.dev = {
|
|
.platform_data = &omap3evm_vwlan,
|
|
},
|
|
};
|
|
|
|
struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
|
|
.board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
|
|
};
|
|
#endif
|
|
|
|
/* VAUX2 for USB */
|
|
static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = {
|
|
REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */
|
|
REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */
|
|
REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"),
|
|
REGULATOR_SUPPLY("vaux2", NULL),
|
|
};
|
|
|
|
static struct regulator_init_data omap3evm_vaux2 = {
|
|
.constraints = {
|
|
.min_uV = 2800000,
|
|
.max_uV = 2800000,
|
|
.apply_uV = true,
|
|
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
|
| REGULATOR_MODE_STANDBY,
|
|
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
|
| REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies),
|
|
.consumer_supplies = omap3evm_vaux2_supplies,
|
|
};
|
|
|
|
static struct twl4030_platform_data omap3evm_twldata = {
|
|
/* platform_data for children goes here */
|
|
.keypad = &omap3evm_kp_data,
|
|
.gpio = &omap3evm_gpio_data,
|
|
.vio = &omap3evm_vio,
|
|
.vmmc1 = &omap3evm_vmmc1,
|
|
.vsim = &omap3evm_vsim,
|
|
};
|
|
|
|
static int __init omap3_evm_i2c_init(void)
|
|
{
|
|
omap3_pmic_get_config(&omap3evm_twldata,
|
|
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
|
|
TWL_COMMON_PDATA_AUDIO,
|
|
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
|
|
|
omap3evm_twldata.vdac->constraints.apply_uV = true;
|
|
omap3evm_twldata.vpll2->constraints.apply_uV = true;
|
|
|
|
omap3_pmic_init("twl4030", &omap3evm_twldata);
|
|
omap_register_i2c_bus(2, 400, NULL, 0);
|
|
omap_register_i2c_bus(3, 400, NULL, 0);
|
|
return 0;
|
|
}
|
|
|
|
static struct usbhs_omap_board_data usbhs_bdata __initdata = {
|
|
|
|
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
|
|
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
|
|
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
|
|
|
|
.phy_reset = true,
|
|
/* PHY reset GPIO will be runtime programmed based on EVM version */
|
|
.reset_gpio_port[0] = -EINVAL,
|
|
.reset_gpio_port[1] = -EINVAL,
|
|
.reset_gpio_port[2] = -EINVAL
|
|
};
|
|
|
|
#ifdef CONFIG_OMAP_MUX
|
|
static struct omap_board_mux omap35x_board_mux[] __initdata = {
|
|
OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
|
|
OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
|
|
OMAP_PIN_OFF_WAKEUPENABLE),
|
|
OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
|
|
OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
|
|
OMAP_PIN_OFF_WAKEUPENABLE),
|
|
OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
|
|
OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
|
|
OMAP_PIN_OFF_NONE),
|
|
#ifdef CONFIG_WL12XX_PLATFORM_DATA
|
|
/* WLAN IRQ - GPIO 149 */
|
|
OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
|
|
|
|
/* WLAN POWER ENABLE - GPIO 150 */
|
|
OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
|
|
|
/* MMC2 SDIO pin muxes for WL12xx */
|
|
OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
#endif
|
|
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
|
};
|
|
|
|
static struct omap_board_mux omap36x_board_mux[] __initdata = {
|
|
OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
|
|
OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
|
|
OMAP_PIN_OFF_WAKEUPENABLE),
|
|
OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
|
|
OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
|
|
OMAP_PIN_OFF_WAKEUPENABLE),
|
|
/* AM/DM37x EVM: DSS data bus muxed with sys_boot */
|
|
OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
|
#ifdef CONFIG_WL12XX_PLATFORM_DATA
|
|
/* WLAN IRQ - GPIO 149 */
|
|
OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
|
|
|
|
/* WLAN POWER ENABLE - GPIO 150 */
|
|
OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
|
|
|
/* MMC2 SDIO pin muxes for WL12xx */
|
|
OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
|
#endif
|
|
|
|
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
|
};
|
|
#else
|
|
#define omap35x_board_mux NULL
|
|
#define omap36x_board_mux NULL
|
|
#endif
|
|
|
|
static struct omap_musb_board_data musb_board_data = {
|
|
.interface_type = MUSB_INTERFACE_ULPI,
|
|
.mode = MUSB_OTG,
|
|
.power = 100,
|
|
};
|
|
|
|
static struct gpio omap3_evm_ehci_gpios[] __initdata = {
|
|
{ OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
|
|
{ OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
|
|
};
|
|
|
|
static void __init omap3_evm_wl12xx_init(void)
|
|
{
|
|
#ifdef CONFIG_WL12XX_PLATFORM_DATA
|
|
int ret;
|
|
|
|
/* WL12xx WLAN Init */
|
|
omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
|
|
ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
|
|
if (ret)
|
|
pr_err("error setting wl12xx data: %d\n", ret);
|
|
ret = platform_device_register(&omap3evm_wlan_regulator);
|
|
if (ret)
|
|
pr_err("error registering wl12xx device: %d\n", ret);
|
|
#endif
|
|
}
|
|
|
|
static struct regulator_consumer_supply dummy_supplies[] = {
|
|
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
|
|
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
|
|
};
|
|
|
|
static struct mtd_partition omap3evm_nand_partitions[] = {
|
|
/* All the partition sizes are listed in terms of NAND block size */
|
|
{
|
|
.name = "X-Loader",
|
|
.offset = 0,
|
|
.size = 4*(SZ_128K),
|
|
.mask_flags = MTD_WRITEABLE
|
|
},
|
|
{
|
|
.name = "U-Boot",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = 14*(SZ_128K),
|
|
.mask_flags = MTD_WRITEABLE
|
|
},
|
|
{
|
|
.name = "U-Boot Env",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = 2*(SZ_128K)
|
|
},
|
|
{
|
|
.name = "Kernel",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = 40*(SZ_128K)
|
|
},
|
|
{
|
|
.name = "File system",
|
|
.size = MTDPART_SIZ_FULL,
|
|
.offset = MTDPART_OFS_APPEND,
|
|
},
|
|
};
|
|
|
|
static void __init omap3_evm_init(void)
|
|
{
|
|
struct omap_board_mux *obm;
|
|
|
|
omap3_evm_get_revision();
|
|
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
|
|
|
|
obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
|
|
omap3_mux_init(obm, OMAP_PACKAGE_CBB);
|
|
|
|
omap_mux_init_gpio(63, OMAP_PIN_INPUT);
|
|
omap_hsmmc_init(mmc);
|
|
|
|
if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
|
|
omap3evm_twldata.vaux2 = &omap3evm_vaux2;
|
|
|
|
omap3_evm_i2c_init();
|
|
|
|
omap_display_init(&omap3_evm_dss_data);
|
|
|
|
omap_serial_init();
|
|
omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
|
|
|
|
/* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
|
|
usb_nop_xceiv_register();
|
|
|
|
if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
|
|
/* enable EHCI VBUS using GPIO22 */
|
|
omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
|
|
/* Select EHCI port on main board */
|
|
omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
|
|
OMAP_PIN_INPUT_PULLUP);
|
|
gpio_request_array(omap3_evm_ehci_gpios,
|
|
ARRAY_SIZE(omap3_evm_ehci_gpios));
|
|
|
|
/* setup EHCI phy reset config */
|
|
omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
|
|
usbhs_bdata.reset_gpio_port[1] = 21;
|
|
|
|
/* EVM REV >= E can supply 500mA with EXTVBUS programming */
|
|
musb_board_data.power = 500;
|
|
musb_board_data.extvbus = 1;
|
|
} else {
|
|
/* setup EHCI phy reset on MDC */
|
|
omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
|
|
usbhs_bdata.reset_gpio_port[1] = 135;
|
|
}
|
|
usb_musb_init(&musb_board_data);
|
|
usbhs_init(&usbhs_bdata);
|
|
board_nand_init(omap3evm_nand_partitions,
|
|
ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
|
|
NAND_BUSWIDTH_16, NULL);
|
|
|
|
omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
|
|
omap3evm_init_smsc911x();
|
|
omap3_evm_display_init();
|
|
omap3_evm_wl12xx_init();
|
|
omap_twl4030_audio_init("omap3evm");
|
|
}
|
|
|
|
MACHINE_START(OMAP3EVM, "OMAP3 EVM")
|
|
/* Maintainer: Syed Mohammed Khasim - Texas Instruments */
|
|
.atag_offset = 0x100,
|
|
.reserve = omap_reserve,
|
|
.map_io = omap3_map_io,
|
|
.init_early = omap35xx_init_early,
|
|
.init_irq = omap3_init_irq,
|
|
.handle_irq = omap3_intc_handle_irq,
|
|
.init_machine = omap3_evm_init,
|
|
.init_late = omap35xx_init_late,
|
|
.timer = &omap3_timer,
|
|
.restart = omap_prcm_restart,
|
|
MACHINE_END
|