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261 lines
7.7 KiB
C
261 lines
7.7 KiB
C
/*
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* Copyright 2011 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "drmP.h"
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#include "nouveau_drv.h"
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#include "nouveau_connector.h"
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#include "nouveau_encoder.h"
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#include "nouveau_crtc.h"
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static bool
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hdmi_sor(struct drm_encoder *encoder)
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{
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struct drm_nouveau_private *dev_priv = encoder->dev->dev_private;
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if (dev_priv->chipset < 0xa3 ||
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dev_priv->chipset == 0xaa ||
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dev_priv->chipset == 0xac)
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return false;
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return true;
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}
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static inline u32
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hdmi_base(struct drm_encoder *encoder)
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{
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struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
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if (!hdmi_sor(encoder))
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return 0x616500 + (nv_crtc->index * 0x800);
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return 0x61c500 + (nv_encoder->or * 0x800);
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}
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static void
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hdmi_wr32(struct drm_encoder *encoder, u32 reg, u32 val)
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{
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nv_wr32(encoder->dev, hdmi_base(encoder) + reg, val);
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}
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static u32
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hdmi_rd32(struct drm_encoder *encoder, u32 reg)
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{
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return nv_rd32(encoder->dev, hdmi_base(encoder) + reg);
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}
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static u32
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hdmi_mask(struct drm_encoder *encoder, u32 reg, u32 mask, u32 val)
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{
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u32 tmp = hdmi_rd32(encoder, reg);
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hdmi_wr32(encoder, reg, (tmp & ~mask) | val);
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return tmp;
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}
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static void
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nouveau_audio_disconnect(struct drm_encoder *encoder)
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{
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struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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struct drm_device *dev = encoder->dev;
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u32 or = nv_encoder->or * 0x800;
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if (hdmi_sor(encoder)) {
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nv_mask(dev, 0x61c448 + or, 0x00000003, 0x00000000);
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}
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}
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static void
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nouveau_audio_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode)
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{
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struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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struct nouveau_connector *nv_connector;
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struct drm_device *dev = encoder->dev;
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u32 or = nv_encoder->or * 0x800;
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int i;
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nv_connector = nouveau_encoder_connector_get(nv_encoder);
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if (!drm_detect_monitor_audio(nv_connector->edid)) {
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nouveau_audio_disconnect(encoder);
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return;
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}
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if (hdmi_sor(encoder)) {
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nv_mask(dev, 0x61c448 + or, 0x00000001, 0x00000001);
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drm_edid_to_eld(&nv_connector->base, nv_connector->edid);
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if (nv_connector->base.eld[0]) {
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u8 *eld = nv_connector->base.eld;
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for (i = 0; i < eld[2] * 4; i++)
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nv_wr32(dev, 0x61c440 + or, (i << 8) | eld[i]);
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for (i = eld[2] * 4; i < 0x60; i++)
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nv_wr32(dev, 0x61c440 + or, (i << 8) | 0x00);
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nv_mask(dev, 0x61c448 + or, 0x00000002, 0x00000002);
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}
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}
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}
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static void
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nouveau_hdmi_infoframe(struct drm_encoder *encoder, u32 ctrl, u8 *frame)
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{
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/* calculate checksum for the infoframe */
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u8 sum = 0, i;
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for (i = 0; i < frame[2]; i++)
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sum += frame[i];
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frame[3] = 256 - sum;
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/* disable infoframe, and write header */
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hdmi_mask(encoder, ctrl + 0x00, 0x00000001, 0x00000000);
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hdmi_wr32(encoder, ctrl + 0x08, *(u32 *)frame & 0xffffff);
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/* register scans tell me the audio infoframe has only one set of
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* subpack regs, according to tegra (gee nvidia, it'd be nice if we
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* could get those docs too!), the hdmi block pads out the rest of
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* the packet on its own.
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*/
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if (ctrl == 0x020)
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frame[2] = 6;
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/* write out checksum and data, weird weird 7 byte register pairs */
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for (i = 0; i < frame[2] + 1; i += 7) {
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u32 rsubpack = ctrl + 0x0c + ((i / 7) * 8);
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u32 *subpack = (u32 *)&frame[3 + i];
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hdmi_wr32(encoder, rsubpack + 0, subpack[0]);
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hdmi_wr32(encoder, rsubpack + 4, subpack[1] & 0xffffff);
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}
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/* enable the infoframe */
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hdmi_mask(encoder, ctrl, 0x00000001, 0x00000001);
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}
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static void
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nouveau_hdmi_video_infoframe(struct drm_encoder *encoder,
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struct drm_display_mode *mode)
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{
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const u8 Y = 0, A = 0, B = 0, S = 0, C = 0, M = 0, R = 0;
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const u8 ITC = 0, EC = 0, Q = 0, SC = 0, VIC = 0, PR = 0;
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const u8 bar_top = 0, bar_bottom = 0, bar_left = 0, bar_right = 0;
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u8 frame[20];
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frame[0x00] = 0x82; /* AVI infoframe */
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frame[0x01] = 0x02; /* version */
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frame[0x02] = 0x0d; /* length */
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frame[0x03] = 0x00;
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frame[0x04] = (Y << 5) | (A << 4) | (B << 2) | S;
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frame[0x05] = (C << 6) | (M << 4) | R;
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frame[0x06] = (ITC << 7) | (EC << 4) | (Q << 2) | SC;
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frame[0x07] = VIC;
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frame[0x08] = PR;
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frame[0x09] = bar_top & 0xff;
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frame[0x0a] = bar_top >> 8;
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frame[0x0b] = bar_bottom & 0xff;
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frame[0x0c] = bar_bottom >> 8;
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frame[0x0d] = bar_left & 0xff;
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frame[0x0e] = bar_left >> 8;
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frame[0x0f] = bar_right & 0xff;
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frame[0x10] = bar_right >> 8;
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frame[0x11] = 0x00;
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frame[0x12] = 0x00;
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frame[0x13] = 0x00;
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nouveau_hdmi_infoframe(encoder, 0x020, frame);
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}
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static void
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nouveau_hdmi_audio_infoframe(struct drm_encoder *encoder,
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struct drm_display_mode *mode)
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{
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const u8 CT = 0x00, CC = 0x01, ceaSS = 0x00, SF = 0x00, FMT = 0x00;
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const u8 CA = 0x00, DM_INH = 0, LSV = 0x00;
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u8 frame[12];
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frame[0x00] = 0x84; /* Audio infoframe */
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frame[0x01] = 0x01; /* version */
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frame[0x02] = 0x0a; /* length */
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frame[0x03] = 0x00;
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frame[0x04] = (CT << 4) | CC;
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frame[0x05] = (SF << 2) | ceaSS;
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frame[0x06] = FMT;
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frame[0x07] = CA;
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frame[0x08] = (DM_INH << 7) | (LSV << 3);
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frame[0x09] = 0x00;
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frame[0x0a] = 0x00;
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frame[0x0b] = 0x00;
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nouveau_hdmi_infoframe(encoder, 0x000, frame);
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}
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static void
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nouveau_hdmi_disconnect(struct drm_encoder *encoder)
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{
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nouveau_audio_disconnect(encoder);
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/* disable audio and avi infoframes */
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hdmi_mask(encoder, 0x000, 0x00000001, 0x00000000);
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hdmi_mask(encoder, 0x020, 0x00000001, 0x00000000);
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/* disable hdmi */
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hdmi_mask(encoder, 0x0a4, 0x40000000, 0x00000000);
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}
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void
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nouveau_hdmi_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode)
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{
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struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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struct nouveau_connector *nv_connector;
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struct drm_device *dev = encoder->dev;
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u32 max_ac_packet, rekey;
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nv_connector = nouveau_encoder_connector_get(nv_encoder);
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if (!mode || !nv_connector || !nv_connector->edid ||
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!drm_detect_hdmi_monitor(nv_connector->edid)) {
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nouveau_hdmi_disconnect(encoder);
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return;
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}
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nouveau_hdmi_video_infoframe(encoder, mode);
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nouveau_hdmi_audio_infoframe(encoder, mode);
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hdmi_mask(encoder, 0x0d0, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
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hdmi_mask(encoder, 0x068, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
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hdmi_mask(encoder, 0x078, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
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nv_mask(dev, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
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nv_mask(dev, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */
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nv_mask(dev, 0x61733c, 0x00100000, 0x00000000); /* !RESETF */
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/* value matches nvidia binary driver, and tegra constant */
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rekey = 56;
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max_ac_packet = mode->htotal - mode->hdisplay;
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max_ac_packet -= rekey;
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max_ac_packet -= 18; /* constant from tegra */
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max_ac_packet /= 32;
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/* enable hdmi */
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hdmi_mask(encoder, 0x0a4, 0x5f1f003f, 0x40000000 | /* enable */
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0x1f000000 | /* unknown */
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max_ac_packet << 16 |
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rekey);
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nouveau_audio_mode_set(encoder, mode);
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}
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