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dfad549d98
The inline assembly differences for v6 vs. v7 are purely optimizations. On a v7 processor, an mrc with the pc sets the condition codes to the 28-31 bits of the register being read. It just so happens that the TX/RX full bits the DCC support code is testing for are high enough in the register to be put into the condition codes. On a v6 processor, this "feature" isn't implemented and thus we have to do the usual read, mask, test operations to check for TX/RX full. Thus, we can drop the v7 implementation and just use the v6 implementation for both. Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
180 lines
2.9 KiB
ArmAsm
180 lines
2.9 KiB
ArmAsm
/*
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* linux/arch/arm/kernel/debug.S
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*
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* Copyright (C) 1994-1999 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* 32-bit debugging code
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*/
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#include <linux/linkage.h>
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.text
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/*
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* Some debugging routines (useful if you've got MM problems and
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* printk isn't working). For DEBUGGING ONLY!!! Do not leave
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* references to these in a production kernel!
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*/
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#if defined(CONFIG_DEBUG_ICEDCC)
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@@ debug using ARM EmbeddedICE DCC channel
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.macro addruart, rp, rv
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.endm
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#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
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.macro senduart, rd, rx
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mcr p14, 0, \rd, c0, c5, 0
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.endm
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.macro busyuart, rd, rx
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1001:
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mrc p14, 0, \rx, c0, c1, 0
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tst \rx, #0x20000000
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beq 1001b
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.endm
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.macro waituart, rd, rx
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mov \rd, #0x2000000
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1001:
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subs \rd, \rd, #1
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bmi 1002f
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mrc p14, 0, \rx, c0, c1, 0
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tst \rx, #0x20000000
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bne 1001b
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1002:
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.endm
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#elif defined(CONFIG_CPU_XSCALE)
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.macro senduart, rd, rx
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mcr p14, 0, \rd, c8, c0, 0
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.endm
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.macro busyuart, rd, rx
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1001:
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mrc p14, 0, \rx, c14, c0, 0
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tst \rx, #0x10000000
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beq 1001b
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.endm
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.macro waituart, rd, rx
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mov \rd, #0x10000000
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1001:
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subs \rd, \rd, #1
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bmi 1002f
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mrc p14, 0, \rx, c14, c0, 0
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tst \rx, #0x10000000
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bne 1001b
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1002:
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.endm
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#else
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.macro senduart, rd, rx
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mcr p14, 0, \rd, c1, c0, 0
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.endm
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.macro busyuart, rd, rx
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1001:
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mrc p14, 0, \rx, c0, c0, 0
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tst \rx, #2
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beq 1001b
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.endm
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.macro waituart, rd, rx
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mov \rd, #0x2000000
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1001:
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subs \rd, \rd, #1
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bmi 1002f
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mrc p14, 0, \rx, c0, c0, 0
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tst \rx, #2
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bne 1001b
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1002:
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.endm
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#endif /* CONFIG_CPU_V6 */
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#else
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#include <mach/debug-macro.S>
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#endif /* CONFIG_DEBUG_ICEDCC */
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#ifdef CONFIG_MMU
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.macro addruart_current, rx, tmp1, tmp2
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addruart \tmp1, \tmp2
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1
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moveq \rx, \tmp1
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movne \rx, \tmp2
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.endm
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#else /* !CONFIG_MMU */
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.macro addruart_current, rx, tmp1, tmp2
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addruart \rx, \tmp1
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.endm
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#endif /* CONFIG_MMU */
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/*
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* Useful debugging routines
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*/
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ENTRY(printhex8)
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mov r1, #8
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b printhex
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ENDPROC(printhex8)
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ENTRY(printhex4)
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mov r1, #4
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b printhex
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ENDPROC(printhex4)
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ENTRY(printhex2)
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mov r1, #2
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printhex: adr r2, hexbuf
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add r3, r2, r1
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mov r1, #0
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strb r1, [r3]
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1: and r1, r0, #15
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mov r0, r0, lsr #4
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cmp r1, #10
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addlt r1, r1, #'0'
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addge r1, r1, #'a' - 10
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strb r1, [r3, #-1]!
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teq r3, r2
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bne 1b
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mov r0, r2
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b printascii
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ENDPROC(printhex2)
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.ltorg
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ENTRY(printascii)
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addruart_current r3, r1, r2
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b 2f
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1: waituart r2, r3
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senduart r1, r3
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busyuart r2, r3
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teq r1, #'\n'
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moveq r1, #'\r'
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beq 1b
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2: teq r0, #0
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ldrneb r1, [r0], #1
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teqne r1, #0
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bne 1b
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mov pc, lr
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ENDPROC(printascii)
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ENTRY(printch)
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addruart_current r3, r1, r2
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mov r1, r0
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mov r0, #0
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b 1b
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ENDPROC(printch)
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hexbuf: .space 16
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