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In eDMA the events are directly mapped to a DMA channel (for example DMA event 14 can only be handled by DMA channel 14). If the memcpy is enabled on the eDMA, there is a possibility that the crossbar driver would assign DMA event number already allocated in eDMA for memcpy. Furthermore the eDMA can be shared with DSP in which case the crossbar driver should also avoid mapping xbar events to DSP used event numbers (or channels). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
70 lines
2.4 KiB
Plaintext
70 lines
2.4 KiB
Plaintext
Texas Instruments DMA Crossbar (DMA request router)
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Required properties:
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- compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
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"ti,am335x-edma-crossbar" for AM335x and AM437x
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- reg: Memory map for accessing module
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- #dma-cells: Should be set to to match with the DMA controller's dma-cells
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for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
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- dma-requests: Number of DMA requests the crossbar can receive
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- dma-masters: phandle pointing to the DMA controller
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The DMA controller node need to have the following poroperties:
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- dma-requests: Number of DMA requests the controller can handle
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Optional properties:
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- ti,dma-safe-map: Safe routing value for unused request lines
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- ti,reserved-dma-request-ranges: DMA request ranges which should not be used
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when mapping xbar input to DMA request, they are either
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allocated to be used by for example the DSP or they are used as
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memcpy channels in eDMA.
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Notes:
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When requesting channel via ti,dra7-dma-crossbar, the DMA clinet must request
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the DMA event number as crossbar ID (input to the DMA crossbar).
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For ti,am335x-edma-crossbar: the meaning of parameters of dmas for clients:
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dmas = <&edma_xbar 12 0 1>; where <12> is the DMA request number, <0> is the TC
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the event should be assigned and <1> is the mux selection for in the crossbar.
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When mux 0 is used the DMA channel can be requested directly from edma node.
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Example:
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/* DMA controller */
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sdma: dma-controller@4a056000 {
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compatible = "ti,omap4430-sdma";
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reg = <0x4a056000 0x1000>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <1>;
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dma-channels = <32>;
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dma-requests = <127>;
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};
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/* DMA crossbar */
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sdma_xbar: dma-router@4a002b78 {
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compatible = "ti,dra7-dma-crossbar";
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reg = <0x4a002b78 0xfc>;
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#dma-cells = <1>;
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dma-requests = <205>;
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ti,dma-safe-map = <0>;
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/* Protect the sDMA request ranges: 10-14 and 100-126 */
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ti,reserved-dma-request-ranges = <10 5>, <100 27>;
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dma-masters = <&sdma>;
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};
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/* DMA client */
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uart1: serial@4806a000 {
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compatible = "ti,omap4-uart";
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reg = <0x4806a000 0x100>;
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interrupts-extended = <&gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart1";
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clock-frequency = <48000000>;
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status = "disabled";
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/* Requesting crossbar input 49 and 50 */
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dmas = <&sdma_xbar 49>, <&sdma_xbar 50>;
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dma-names = "tx", "rx";
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};
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