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1792f68b0e
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
633 lines
17 KiB
C
633 lines
17 KiB
C
/*
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I2C functions
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Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
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Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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This file includes an i2c implementation that was reverse engineered
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from the Hauppauge windows driver. Older ivtv versions used i2c-algo-bit,
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which whilst fine under most circumstances, had trouble with the Zilog
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CPU on the PVR-150 which handles IR functions (occasional inability to
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communicate with the chip until it was reset) and also with the i2c
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bus being completely unreachable when multiple PVR cards were present.
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The implementation is very similar to i2c-algo-bit, but there are enough
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subtle differences that the two are hard to merge. The general strategy
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employed by i2c-algo-bit is to use udelay() to implement the timing
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when putting out bits on the scl/sda lines. The general strategy taken
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here is to poll the lines for state changes (see ivtv_waitscl and
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ivtv_waitsda). In addition there are small delays at various locations
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which poll the SCL line 5 times (ivtv_scldelay). I would guess that
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since this is memory mapped I/O that the length of those delays is tied
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to the PCI bus clock. There is some extra code to do with recovery
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and retries. Since it is not known what causes the actual i2c problems
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in the first place, the only goal if one was to attempt to use
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i2c-algo-bit would be to try to make it follow the same code path.
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This would be a lot of work, and I'm also not convinced that it would
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provide a generic benefit to i2c-algo-bit. Therefore consider this
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an engineering solution -- not pretty, but it works.
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Some more general comments about what we are doing:
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The i2c bus is a 2 wire serial bus, with clock (SCL) and data (SDA)
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lines. To communicate on the bus (as a master, we don't act as a slave),
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we first initiate a start condition (ivtv_start). We then write the
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address of the device that we want to communicate with, along with a flag
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that indicates whether this is a read or a write. The slave then issues
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an ACK signal (ivtv_ack), which tells us that it is ready for reading /
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writing. We then proceed with reading or writing (ivtv_read/ivtv_write),
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and finally issue a stop condition (ivtv_stop) to make the bus available
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to other masters.
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There is an additional form of transaction where a write may be
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immediately followed by a read. In this case, there is no intervening
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stop condition. (Only the msp3400 chip uses this method of data transfer).
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*/
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#include "ivtv-driver.h"
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#include "ivtv-cards.h"
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#include "ivtv-gpio.h"
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#include "ivtv-i2c.h"
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/* i2c implementation for cx23415/6 chip, ivtv project.
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* Author: Kevin Thayer (nufan_wfk at yahoo.com)
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*/
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/* i2c stuff */
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#define IVTV_REG_I2C_SETSCL_OFFSET 0x7000
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#define IVTV_REG_I2C_SETSDA_OFFSET 0x7004
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#define IVTV_REG_I2C_GETSCL_OFFSET 0x7008
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#define IVTV_REG_I2C_GETSDA_OFFSET 0x700c
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#define IVTV_CS53L32A_I2C_ADDR 0x11
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#define IVTV_M52790_I2C_ADDR 0x48
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#define IVTV_CX25840_I2C_ADDR 0x44
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#define IVTV_SAA7115_I2C_ADDR 0x21
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#define IVTV_SAA7127_I2C_ADDR 0x44
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#define IVTV_SAA717x_I2C_ADDR 0x21
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#define IVTV_MSP3400_I2C_ADDR 0x40
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#define IVTV_HAUPPAUGE_I2C_ADDR 0x50
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#define IVTV_WM8739_I2C_ADDR 0x1a
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#define IVTV_WM8775_I2C_ADDR 0x1b
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#define IVTV_TEA5767_I2C_ADDR 0x60
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#define IVTV_UPD64031A_I2C_ADDR 0x12
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#define IVTV_UPD64083_I2C_ADDR 0x5c
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#define IVTV_VP27SMPX_I2C_ADDR 0x5b
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#define IVTV_M52790_I2C_ADDR 0x48
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/* This array should match the IVTV_HW_ defines */
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static const u8 hw_addrs[] = {
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IVTV_CX25840_I2C_ADDR,
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IVTV_SAA7115_I2C_ADDR,
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IVTV_SAA7127_I2C_ADDR,
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IVTV_MSP3400_I2C_ADDR,
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0,
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IVTV_WM8775_I2C_ADDR,
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IVTV_CS53L32A_I2C_ADDR,
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0,
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IVTV_SAA7115_I2C_ADDR,
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IVTV_UPD64031A_I2C_ADDR,
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IVTV_UPD64083_I2C_ADDR,
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IVTV_SAA717x_I2C_ADDR,
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IVTV_WM8739_I2C_ADDR,
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IVTV_VP27SMPX_I2C_ADDR,
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IVTV_M52790_I2C_ADDR,
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0 /* IVTV_HW_GPIO dummy driver ID */
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};
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/* This array should match the IVTV_HW_ defines */
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static const char *hw_modules[] = {
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"cx25840",
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"saa7115",
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"saa7127",
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"msp3400",
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"tuner",
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"wm8775",
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"cs53l32a",
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NULL,
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"saa7115",
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"upd64031a",
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"upd64083",
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"saa717x",
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"wm8739",
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"vp27smpx",
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"m52790",
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NULL
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};
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/* This array should match the IVTV_HW_ defines */
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static const char * const hw_devicenames[] = {
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"cx25840",
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"saa7115",
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"saa7127_auto", /* saa7127 or saa7129 */
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"msp3400",
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"tuner",
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"wm8775",
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"cs53l32a",
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"tveeprom",
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"saa7114",
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"upd64031a",
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"upd64083",
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"saa717x",
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"wm8739",
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"vp27smpx",
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"m52790",
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"gpio",
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};
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int ivtv_i2c_register(struct ivtv *itv, unsigned idx)
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{
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struct v4l2_subdev *sd;
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struct i2c_adapter *adap = &itv->i2c_adap;
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const char *mod = hw_modules[idx];
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const char *type = hw_devicenames[idx];
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u32 hw = 1 << idx;
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if (idx >= ARRAY_SIZE(hw_addrs))
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return -1;
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if (hw == IVTV_HW_TUNER) {
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/* special tuner handling */
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sd = v4l2_i2c_new_probed_subdev(&itv->v4l2_dev,
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adap, mod, type,
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itv->card_i2c->radio);
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if (sd)
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sd->grp_id = 1 << idx;
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sd = v4l2_i2c_new_probed_subdev(&itv->v4l2_dev,
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adap, mod, type,
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itv->card_i2c->demod);
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if (sd)
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sd->grp_id = 1 << idx;
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sd = v4l2_i2c_new_probed_subdev(&itv->v4l2_dev,
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adap, mod, type,
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itv->card_i2c->tv);
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if (sd)
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sd->grp_id = 1 << idx;
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return sd ? 0 : -1;
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}
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if (!hw_addrs[idx])
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return -1;
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if (hw == IVTV_HW_UPD64031A || hw == IVTV_HW_UPD6408X) {
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sd = v4l2_i2c_new_probed_subdev_addr(&itv->v4l2_dev,
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adap, mod, type, hw_addrs[idx]);
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} else {
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sd = v4l2_i2c_new_subdev(&itv->v4l2_dev,
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adap, mod, type, hw_addrs[idx]);
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}
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if (sd)
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sd->grp_id = 1 << idx;
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return sd ? 0 : -1;
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}
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struct v4l2_subdev *ivtv_find_hw(struct ivtv *itv, u32 hw)
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{
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struct v4l2_subdev *result = NULL;
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struct v4l2_subdev *sd;
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spin_lock(&itv->v4l2_dev.lock);
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v4l2_device_for_each_subdev(sd, &itv->v4l2_dev) {
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if (sd->grp_id == hw) {
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result = sd;
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break;
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}
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}
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spin_unlock(&itv->v4l2_dev.lock);
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return result;
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}
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/* Set the serial clock line to the desired state */
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static void ivtv_setscl(struct ivtv *itv, int state)
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{
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/* write them out */
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/* write bits are inverted */
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write_reg(~state, IVTV_REG_I2C_SETSCL_OFFSET);
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}
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/* Set the serial data line to the desired state */
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static void ivtv_setsda(struct ivtv *itv, int state)
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{
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/* write them out */
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/* write bits are inverted */
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write_reg(~state & 1, IVTV_REG_I2C_SETSDA_OFFSET);
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}
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/* Read the serial clock line */
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static int ivtv_getscl(struct ivtv *itv)
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{
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return read_reg(IVTV_REG_I2C_GETSCL_OFFSET) & 1;
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}
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/* Read the serial data line */
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static int ivtv_getsda(struct ivtv *itv)
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{
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return read_reg(IVTV_REG_I2C_GETSDA_OFFSET) & 1;
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}
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/* Implement a short delay by polling the serial clock line */
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static void ivtv_scldelay(struct ivtv *itv)
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{
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int i;
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for (i = 0; i < 5; ++i)
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ivtv_getscl(itv);
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}
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/* Wait for the serial clock line to become set to a specific value */
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static int ivtv_waitscl(struct ivtv *itv, int val)
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{
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int i;
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ivtv_scldelay(itv);
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for (i = 0; i < 1000; ++i) {
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if (ivtv_getscl(itv) == val)
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return 1;
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}
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return 0;
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}
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/* Wait for the serial data line to become set to a specific value */
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static int ivtv_waitsda(struct ivtv *itv, int val)
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{
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int i;
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ivtv_scldelay(itv);
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for (i = 0; i < 1000; ++i) {
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if (ivtv_getsda(itv) == val)
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return 1;
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}
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return 0;
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}
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/* Wait for the slave to issue an ACK */
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static int ivtv_ack(struct ivtv *itv)
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{
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int ret = 0;
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if (ivtv_getscl(itv) == 1) {
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IVTV_DEBUG_HI_I2C("SCL was high starting an ack\n");
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ivtv_setscl(itv, 0);
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if (!ivtv_waitscl(itv, 0)) {
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IVTV_DEBUG_I2C("Could not set SCL low starting an ack\n");
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return -EREMOTEIO;
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}
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}
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ivtv_setsda(itv, 1);
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ivtv_scldelay(itv);
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ivtv_setscl(itv, 1);
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if (!ivtv_waitsda(itv, 0)) {
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IVTV_DEBUG_I2C("Slave did not ack\n");
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ret = -EREMOTEIO;
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}
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ivtv_setscl(itv, 0);
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if (!ivtv_waitscl(itv, 0)) {
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IVTV_DEBUG_I2C("Failed to set SCL low after ACK\n");
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* Write a single byte to the i2c bus and wait for the slave to ACK */
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static int ivtv_sendbyte(struct ivtv *itv, unsigned char byte)
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{
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int i, bit;
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IVTV_DEBUG_HI_I2C("write %x\n",byte);
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for (i = 0; i < 8; ++i, byte<<=1) {
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ivtv_setscl(itv, 0);
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if (!ivtv_waitscl(itv, 0)) {
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IVTV_DEBUG_I2C("Error setting SCL low\n");
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return -EREMOTEIO;
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}
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bit = (byte>>7)&1;
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ivtv_setsda(itv, bit);
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if (!ivtv_waitsda(itv, bit)) {
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IVTV_DEBUG_I2C("Error setting SDA\n");
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return -EREMOTEIO;
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}
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ivtv_setscl(itv, 1);
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if (!ivtv_waitscl(itv, 1)) {
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IVTV_DEBUG_I2C("Slave not ready for bit\n");
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return -EREMOTEIO;
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}
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}
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ivtv_setscl(itv, 0);
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if (!ivtv_waitscl(itv, 0)) {
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IVTV_DEBUG_I2C("Error setting SCL low\n");
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return -EREMOTEIO;
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}
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return ivtv_ack(itv);
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}
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/* Read a byte from the i2c bus and send a NACK if applicable (i.e. for the
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final byte) */
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static int ivtv_readbyte(struct ivtv *itv, unsigned char *byte, int nack)
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{
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int i;
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*byte = 0;
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ivtv_setsda(itv, 1);
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ivtv_scldelay(itv);
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for (i = 0; i < 8; ++i) {
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ivtv_setscl(itv, 0);
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ivtv_scldelay(itv);
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ivtv_setscl(itv, 1);
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if (!ivtv_waitscl(itv, 1)) {
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IVTV_DEBUG_I2C("Error setting SCL high\n");
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return -EREMOTEIO;
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}
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*byte = ((*byte)<<1)|ivtv_getsda(itv);
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}
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ivtv_setscl(itv, 0);
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ivtv_scldelay(itv);
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ivtv_setsda(itv, nack);
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ivtv_scldelay(itv);
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ivtv_setscl(itv, 1);
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ivtv_scldelay(itv);
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ivtv_setscl(itv, 0);
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ivtv_scldelay(itv);
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IVTV_DEBUG_HI_I2C("read %x\n",*byte);
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return 0;
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}
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/* Issue a start condition on the i2c bus to alert slaves to prepare for
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an address write */
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static int ivtv_start(struct ivtv *itv)
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{
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int sda;
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sda = ivtv_getsda(itv);
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if (sda != 1) {
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IVTV_DEBUG_HI_I2C("SDA was low at start\n");
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ivtv_setsda(itv, 1);
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if (!ivtv_waitsda(itv, 1)) {
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IVTV_DEBUG_I2C("SDA stuck low\n");
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return -EREMOTEIO;
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}
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}
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if (ivtv_getscl(itv) != 1) {
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ivtv_setscl(itv, 1);
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if (!ivtv_waitscl(itv, 1)) {
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IVTV_DEBUG_I2C("SCL stuck low at start\n");
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return -EREMOTEIO;
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}
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}
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ivtv_setsda(itv, 0);
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ivtv_scldelay(itv);
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return 0;
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}
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/* Issue a stop condition on the i2c bus to release it */
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static int ivtv_stop(struct ivtv *itv)
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{
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int i;
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if (ivtv_getscl(itv) != 0) {
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IVTV_DEBUG_HI_I2C("SCL not low when stopping\n");
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ivtv_setscl(itv, 0);
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if (!ivtv_waitscl(itv, 0)) {
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IVTV_DEBUG_I2C("SCL could not be set low\n");
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}
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}
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ivtv_setsda(itv, 0);
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ivtv_scldelay(itv);
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ivtv_setscl(itv, 1);
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if (!ivtv_waitscl(itv, 1)) {
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IVTV_DEBUG_I2C("SCL could not be set high\n");
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return -EREMOTEIO;
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}
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ivtv_scldelay(itv);
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ivtv_setsda(itv, 1);
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if (!ivtv_waitsda(itv, 1)) {
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IVTV_DEBUG_I2C("resetting I2C\n");
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for (i = 0; i < 16; ++i) {
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ivtv_setscl(itv, 0);
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ivtv_scldelay(itv);
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ivtv_setscl(itv, 1);
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ivtv_scldelay(itv);
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ivtv_setsda(itv, 1);
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}
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ivtv_waitsda(itv, 1);
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return -EREMOTEIO;
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}
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return 0;
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}
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/* Write a message to the given i2c slave. do_stop may be 0 to prevent
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issuing the i2c stop condition (when following with a read) */
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static int ivtv_write(struct ivtv *itv, unsigned char addr, unsigned char *data, u32 len, int do_stop)
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{
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int retry, ret = -EREMOTEIO;
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u32 i;
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for (retry = 0; ret != 0 && retry < 8; ++retry) {
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ret = ivtv_start(itv);
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if (ret == 0) {
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ret = ivtv_sendbyte(itv, addr<<1);
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for (i = 0; ret == 0 && i < len; ++i)
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ret = ivtv_sendbyte(itv, data[i]);
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}
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if (ret != 0 || do_stop) {
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ivtv_stop(itv);
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}
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}
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if (ret)
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IVTV_DEBUG_I2C("i2c write to %x failed\n", addr);
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return ret;
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}
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/* Read data from the given i2c slave. A stop condition is always issued. */
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static int ivtv_read(struct ivtv *itv, unsigned char addr, unsigned char *data, u32 len)
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{
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int retry, ret = -EREMOTEIO;
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u32 i;
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for (retry = 0; ret != 0 && retry < 8; ++retry) {
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ret = ivtv_start(itv);
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if (ret == 0)
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ret = ivtv_sendbyte(itv, (addr << 1) | 1);
|
|
for (i = 0; ret == 0 && i < len; ++i) {
|
|
ret = ivtv_readbyte(itv, &data[i], i == len - 1);
|
|
}
|
|
ivtv_stop(itv);
|
|
}
|
|
if (ret)
|
|
IVTV_DEBUG_I2C("i2c read from %x failed\n", addr);
|
|
return ret;
|
|
}
|
|
|
|
/* Kernel i2c transfer implementation. Takes a number of messages to be read
|
|
or written. If a read follows a write, this will occur without an
|
|
intervening stop condition */
|
|
static int ivtv_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
|
|
{
|
|
struct v4l2_device *v4l2_dev = i2c_get_adapdata(i2c_adap);
|
|
struct ivtv *itv = to_ivtv(v4l2_dev);
|
|
int retval;
|
|
int i;
|
|
|
|
mutex_lock(&itv->i2c_bus_lock);
|
|
for (i = retval = 0; retval == 0 && i < num; i++) {
|
|
if (msgs[i].flags & I2C_M_RD)
|
|
retval = ivtv_read(itv, msgs[i].addr, msgs[i].buf, msgs[i].len);
|
|
else {
|
|
/* if followed by a read, don't stop */
|
|
int stop = !(i + 1 < num && msgs[i + 1].flags == I2C_M_RD);
|
|
|
|
retval = ivtv_write(itv, msgs[i].addr, msgs[i].buf, msgs[i].len, stop);
|
|
}
|
|
}
|
|
mutex_unlock(&itv->i2c_bus_lock);
|
|
return retval ? retval : num;
|
|
}
|
|
|
|
/* Kernel i2c capabilities */
|
|
static u32 ivtv_functionality(struct i2c_adapter *adap)
|
|
{
|
|
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
|
|
}
|
|
|
|
static struct i2c_algorithm ivtv_algo = {
|
|
.master_xfer = ivtv_xfer,
|
|
.functionality = ivtv_functionality,
|
|
};
|
|
|
|
/* template for our-bit banger */
|
|
static struct i2c_adapter ivtv_i2c_adap_hw_template = {
|
|
.name = "ivtv i2c driver",
|
|
.id = I2C_HW_B_CX2341X,
|
|
.algo = &ivtv_algo,
|
|
.algo_data = NULL, /* filled from template */
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
static void ivtv_setscl_old(void *data, int state)
|
|
{
|
|
struct ivtv *itv = (struct ivtv *)data;
|
|
|
|
if (state)
|
|
itv->i2c_state |= 0x01;
|
|
else
|
|
itv->i2c_state &= ~0x01;
|
|
|
|
/* write them out */
|
|
/* write bits are inverted */
|
|
write_reg(~itv->i2c_state, IVTV_REG_I2C_SETSCL_OFFSET);
|
|
}
|
|
|
|
static void ivtv_setsda_old(void *data, int state)
|
|
{
|
|
struct ivtv *itv = (struct ivtv *)data;
|
|
|
|
if (state)
|
|
itv->i2c_state |= 0x01;
|
|
else
|
|
itv->i2c_state &= ~0x01;
|
|
|
|
/* write them out */
|
|
/* write bits are inverted */
|
|
write_reg(~itv->i2c_state, IVTV_REG_I2C_SETSDA_OFFSET);
|
|
}
|
|
|
|
static int ivtv_getscl_old(void *data)
|
|
{
|
|
struct ivtv *itv = (struct ivtv *)data;
|
|
|
|
return read_reg(IVTV_REG_I2C_GETSCL_OFFSET) & 1;
|
|
}
|
|
|
|
static int ivtv_getsda_old(void *data)
|
|
{
|
|
struct ivtv *itv = (struct ivtv *)data;
|
|
|
|
return read_reg(IVTV_REG_I2C_GETSDA_OFFSET) & 1;
|
|
}
|
|
|
|
/* template for i2c-bit-algo */
|
|
static struct i2c_adapter ivtv_i2c_adap_template = {
|
|
.name = "ivtv i2c driver",
|
|
.id = I2C_HW_B_CX2341X,
|
|
.algo = NULL, /* set by i2c-algo-bit */
|
|
.algo_data = NULL, /* filled from template */
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
static const struct i2c_algo_bit_data ivtv_i2c_algo_template = {
|
|
.setsda = ivtv_setsda_old,
|
|
.setscl = ivtv_setscl_old,
|
|
.getsda = ivtv_getsda_old,
|
|
.getscl = ivtv_getscl_old,
|
|
.udelay = 10,
|
|
.timeout = 200,
|
|
};
|
|
|
|
static struct i2c_client ivtv_i2c_client_template = {
|
|
.name = "ivtv internal",
|
|
};
|
|
|
|
/* init + register i2c algo-bit adapter */
|
|
int init_ivtv_i2c(struct ivtv *itv)
|
|
{
|
|
IVTV_DEBUG_I2C("i2c init\n");
|
|
|
|
/* Sanity checks for the I2C hardware arrays. They must be the
|
|
* same size and GPIO must be the last entry.
|
|
*/
|
|
if (ARRAY_SIZE(hw_devicenames) != ARRAY_SIZE(hw_addrs) ||
|
|
ARRAY_SIZE(hw_devicenames) != ARRAY_SIZE(hw_modules) ||
|
|
IVTV_HW_GPIO != (1 << (ARRAY_SIZE(hw_addrs) - 1))) {
|
|
IVTV_ERR("Mismatched I2C hardware arrays\n");
|
|
return -ENODEV;
|
|
}
|
|
if (itv->options.newi2c > 0) {
|
|
memcpy(&itv->i2c_adap, &ivtv_i2c_adap_hw_template,
|
|
sizeof(struct i2c_adapter));
|
|
} else {
|
|
memcpy(&itv->i2c_adap, &ivtv_i2c_adap_template,
|
|
sizeof(struct i2c_adapter));
|
|
memcpy(&itv->i2c_algo, &ivtv_i2c_algo_template,
|
|
sizeof(struct i2c_algo_bit_data));
|
|
}
|
|
itv->i2c_algo.data = itv;
|
|
itv->i2c_adap.algo_data = &itv->i2c_algo;
|
|
|
|
sprintf(itv->i2c_adap.name + strlen(itv->i2c_adap.name), " #%d",
|
|
itv->instance);
|
|
i2c_set_adapdata(&itv->i2c_adap, &itv->v4l2_dev);
|
|
|
|
memcpy(&itv->i2c_client, &ivtv_i2c_client_template,
|
|
sizeof(struct i2c_client));
|
|
itv->i2c_client.adapter = &itv->i2c_adap;
|
|
itv->i2c_adap.dev.parent = &itv->pdev->dev;
|
|
|
|
IVTV_DEBUG_I2C("setting scl and sda to 1\n");
|
|
ivtv_setscl(itv, 1);
|
|
ivtv_setsda(itv, 1);
|
|
|
|
if (itv->options.newi2c > 0)
|
|
return i2c_add_adapter(&itv->i2c_adap);
|
|
else
|
|
return i2c_bit_add_bus(&itv->i2c_adap);
|
|
}
|
|
|
|
void exit_ivtv_i2c(struct ivtv *itv)
|
|
{
|
|
IVTV_DEBUG_I2C("i2c exit\n");
|
|
|
|
i2c_del_adapter(&itv->i2c_adap);
|
|
}
|