linux/arch/xtensa/mm
Max Filippov 36de10c478 xtensa: fix TLB sanity checker
Virtual and translated addresses retrieved by the xtensa TLB sanity
checker must be consistent, i.e. correspond to the same state of the
checked TLB entry. KASAN shadow memory is mapped dynamically using
auto-refill TLB entries and thus may change TLB state between the
virtual and translated address retrieval, resulting in false TLB
insanity report.
Move read_xtlb_translation close to read_xtlb_virtual to make sure that
read values are consistent.

Cc: stable@vger.kernel.org
Fixes: a99e07ee5e ("xtensa: check TLB sanity on return to userspace")
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-11-26 11:33:39 -08:00
..
cache.c mm: remove include/linux/bootmem.h 2018-10-31 08:54:16 -07:00
fault.c xtensa: get rid of __ARCH_USE_5LEVEL_HACK 2019-11-26 11:33:39 -08:00
highmem.c sched/preempt, mm/kmap: Explicitly disable/enable preemption in kmap_atomic_* 2015-05-19 08:39:14 +02:00
init.c xtensa: use correct symbol for the end of .rodata 2019-10-20 23:48:29 -07:00
ioremap.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
kasan_init.c xtensa: get rid of __ARCH_USE_5LEVEL_HACK 2019-11-26 11:33:39 -08:00
Makefile treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
misc.S xtensa: abstract 'entry' and 'retw' in assembly code 2019-07-08 10:04:48 -07:00
mmu.c xtensa: get rid of __ARCH_USE_5LEVEL_HACK 2019-11-26 11:33:39 -08:00
tlb.c xtensa: fix TLB sanity checker 2019-11-26 11:33:39 -08:00