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percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
339 lines
7.7 KiB
C
339 lines
7.7 KiB
C
/*
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* arch/xtensa/kernel/process.c
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*
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* Xtensa Processor version.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*
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* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
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* Chris Zankel <chris@zankel.net>
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* Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
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* Kevin Chea
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/elf.h>
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#include <linux/init.h>
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#include <linux/prctl.h>
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#include <linux/init_task.h>
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#include <linux/module.h>
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#include <linux/mqueue.h>
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#include <linux/fs.h>
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#include <linux/slab.h>
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#include <asm/pgtable.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/platform.h>
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#include <asm/mmu.h>
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#include <asm/irq.h>
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#include <asm/atomic.h>
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#include <asm/asm-offsets.h>
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#include <asm/regs.h>
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extern void ret_from_fork(void);
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struct task_struct *current_set[NR_CPUS] = {&init_task, };
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void (*pm_power_off)(void) = NULL;
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EXPORT_SYMBOL(pm_power_off);
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#if XTENSA_HAVE_COPROCESSORS
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void coprocessor_release_all(struct thread_info *ti)
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{
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unsigned long cpenable;
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int i;
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/* Make sure we don't switch tasks during this operation. */
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preempt_disable();
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/* Walk through all cp owners and release it for the requested one. */
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cpenable = ti->cpenable;
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for (i = 0; i < XCHAL_CP_MAX; i++) {
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if (coprocessor_owner[i] == ti) {
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coprocessor_owner[i] = 0;
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cpenable &= ~(1 << i);
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}
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}
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ti->cpenable = cpenable;
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coprocessor_clear_cpenable();
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preempt_enable();
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}
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void coprocessor_flush_all(struct thread_info *ti)
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{
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unsigned long cpenable;
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int i;
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preempt_disable();
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cpenable = ti->cpenable;
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for (i = 0; i < XCHAL_CP_MAX; i++) {
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if ((cpenable & 1) != 0 && coprocessor_owner[i] == ti)
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coprocessor_flush(ti, i);
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cpenable >>= 1;
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}
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preempt_enable();
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}
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#endif
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/*
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* Powermanagement idle function, if any is provided by the platform.
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*/
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void cpu_idle(void)
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{
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local_irq_enable();
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/* endless idle loop with no priority at all */
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while (1) {
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while (!need_resched())
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platform_idle();
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preempt_enable_no_resched();
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schedule();
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preempt_disable();
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}
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}
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/*
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* This is called when the thread calls exit().
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*/
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void exit_thread(void)
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{
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#if XTENSA_HAVE_COPROCESSORS
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coprocessor_release_all(current_thread_info());
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#endif
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}
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/*
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* Flush thread state. This is called when a thread does an execve()
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* Note that we flush coprocessor registers for the case execve fails.
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*/
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void flush_thread(void)
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{
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#if XTENSA_HAVE_COPROCESSORS
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struct thread_info *ti = current_thread_info();
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coprocessor_flush_all(ti);
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coprocessor_release_all(ti);
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#endif
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}
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/*
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* This is called before the thread is copied.
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*/
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void prepare_to_copy(struct task_struct *tsk)
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{
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#if XTENSA_HAVE_COPROCESSORS
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coprocessor_flush_all(task_thread_info(tsk));
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#endif
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}
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/*
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* Copy thread.
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*
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* The stack layout for the new thread looks like this:
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*
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* +------------------------+ <- sp in childregs (= tos)
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* | childregs |
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* +------------------------+ <- thread.sp = sp in dummy-frame
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* | dummy-frame | (saved in dummy-frame spill-area)
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* +------------------------+
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*
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* We create a dummy frame to return to ret_from_fork:
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* a0 points to ret_from_fork (simulating a call4)
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* sp points to itself (thread.sp)
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* a2, a3 are unused.
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*
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* Note: This is a pristine frame, so we don't need any spill region on top of
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* childregs.
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*/
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int copy_thread(unsigned long clone_flags, unsigned long usp,
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unsigned long unused,
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struct task_struct * p, struct pt_regs * regs)
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{
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struct pt_regs *childregs;
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struct thread_info *ti;
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unsigned long tos;
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int user_mode = user_mode(regs);
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/* Set up new TSS. */
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tos = (unsigned long)task_stack_page(p) + THREAD_SIZE;
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if (user_mode)
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childregs = (struct pt_regs*)(tos - PT_USER_SIZE);
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else
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childregs = (struct pt_regs*)tos - 1;
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*childregs = *regs;
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/* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */
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*((int*)childregs - 3) = (unsigned long)childregs;
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*((int*)childregs - 4) = 0;
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childregs->areg[1] = tos;
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childregs->areg[2] = 0;
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p->set_child_tid = p->clear_child_tid = NULL;
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p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1);
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p->thread.sp = (unsigned long)childregs;
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if (user_mode(regs)) {
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int len = childregs->wmask & ~0xf;
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childregs->areg[1] = usp;
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memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4],
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®s->areg[XCHAL_NUM_AREGS - len/4], len);
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// FIXME: we need to set THREADPTR in thread_info...
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if (clone_flags & CLONE_SETTLS)
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childregs->areg[2] = childregs->areg[6];
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} else {
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/* In kernel space, we start a new thread with a new stack. */
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childregs->wmask = 1;
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}
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#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
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ti = task_thread_info(p);
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ti->cpenable = 0;
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#endif
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return 0;
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}
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/*
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* These bracket the sleeping functions..
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*/
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unsigned long get_wchan(struct task_struct *p)
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{
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unsigned long sp, pc;
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unsigned long stack_page = (unsigned long) task_stack_page(p);
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int count = 0;
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if (!p || p == current || p->state == TASK_RUNNING)
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return 0;
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sp = p->thread.sp;
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pc = MAKE_PC_FROM_RA(p->thread.ra, p->thread.sp);
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do {
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if (sp < stack_page + sizeof(struct task_struct) ||
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sp >= (stack_page + THREAD_SIZE) ||
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pc == 0)
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return 0;
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if (!in_sched_functions(pc))
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return pc;
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/* Stack layout: sp-4: ra, sp-3: sp' */
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pc = MAKE_PC_FROM_RA(*(unsigned long*)sp - 4, sp);
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sp = *(unsigned long *)sp - 3;
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} while (count++ < 16);
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return 0;
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}
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/*
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* xtensa_gregset_t and 'struct pt_regs' are vastly different formats
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* of processor registers. Besides different ordering,
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* xtensa_gregset_t contains non-live register information that
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* 'struct pt_regs' does not. Exception handling (primarily) uses
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* 'struct pt_regs'. Core files and ptrace use xtensa_gregset_t.
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*
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*/
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void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs)
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{
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unsigned long wb, ws, wm;
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int live, last;
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wb = regs->windowbase;
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ws = regs->windowstart;
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wm = regs->wmask;
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ws = ((ws >> wb) | (ws << (WSBITS - wb))) & ((1 << WSBITS) - 1);
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/* Don't leak any random bits. */
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memset(elfregs, 0, sizeof (elfregs));
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/* Note: PS.EXCM is not set while user task is running; its
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* being set in regs->ps is for exception handling convenience.
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*/
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elfregs->pc = regs->pc;
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elfregs->ps = (regs->ps & ~(1 << PS_EXCM_BIT));
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elfregs->lbeg = regs->lbeg;
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elfregs->lend = regs->lend;
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elfregs->lcount = regs->lcount;
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elfregs->sar = regs->sar;
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elfregs->windowstart = ws;
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live = (wm & 2) ? 4 : (wm & 4) ? 8 : (wm & 8) ? 12 : 16;
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last = XCHAL_NUM_AREGS - (wm >> 4) * 4;
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memcpy(elfregs->a, regs->areg, live * 4);
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memcpy(elfregs->a + last, regs->areg + last, (wm >> 4) * 16);
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}
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int dump_fpu(void)
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{
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return 0;
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}
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asmlinkage
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long xtensa_clone(unsigned long clone_flags, unsigned long newsp,
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void __user *parent_tid, void *child_tls,
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void __user *child_tid, long a5,
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struct pt_regs *regs)
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{
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if (!newsp)
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newsp = regs->areg[1];
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return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
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}
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/*
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* xtensa_execve() executes a new program.
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*/
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asmlinkage
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long xtensa_execve(char __user *name, char __user * __user *argv,
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char __user * __user *envp,
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long a3, long a4, long a5,
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struct pt_regs *regs)
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{
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long error;
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char * filename;
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filename = getname(name);
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error = PTR_ERR(filename);
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if (IS_ERR(filename))
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goto out;
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error = do_execve(filename, argv, envp, regs);
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putname(filename);
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out:
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return error;
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}
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