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343f132752
The pinctrl-sunxi driver originally used the pin number as the gpio
range offset. This resulted in large, bogus gpio numbers for the
new sun6i-a31-r pinctrl devices.
This patch makes the driver number the gpios ranges starting from an
offset of 0, by subtracting the pin_base number from the pin number.
This also makes the system-wide gpio number match the pin number.
Tested on sun8i with sysfs exported gpios.
This patch also changes the GPIO bindings for R_PIO:
gpios = <&r_pio B N flag>;
Where B originally was the pinbank label (L or M) counted from A,
with this patch it becomes (L or M) counted from its pinbank base (L).
Thus
gpios = <&r_pio 10 11 0>; /* PL11 */
becomes
gpios = <&r_pio 0 11 0>; /* PL11 */
IMO this is correct, as the binding shows the bank offset and pin offset
within the bank for the GPIO controller. But I'm worried it might be a
bit confusing.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| pinctrl-sun4i-a10.c | ||
| pinctrl-sun5i-a10s.c | ||
| pinctrl-sun5i-a13.c | ||
| pinctrl-sun6i-a31-r.c | ||
| pinctrl-sun6i-a31.c | ||
| pinctrl-sun7i-a20.c | ||
| pinctrl-sun8i-a23-r.c | ||
| pinctrl-sun8i-a23.c | ||
| pinctrl-sunxi.c | ||
| pinctrl-sunxi.h | ||