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d6e62e7f10
struct spi_device in struct ds1343_priv is not used, remove it. CC: Alessandro Zummo <a.zummo@towertech.it> CC: Alexandre Belloni <alexandre.belloni@bootlin.com> CC: Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com> CC: Ankur Srivastava <sankurece@gmail.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Link: https://lore.kernel.org/r/20191218081917.3308211-1-iwamatsu@nigauri.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
487 lines
11 KiB
C
487 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* rtc-ds1343.c
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*
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* Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible
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* Real Time Clock
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*
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* Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>
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* Ankur Srivastava <sankurece@gmail.com> : DS1343 Nvram Support
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/spi/spi.h>
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#include <linux/regmap.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <linux/pm.h>
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#include <linux/pm_wakeirq.h>
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#include <linux/slab.h>
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#define DALLAS_MAXIM_DS1343 0
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#define DALLAS_MAXIM_DS1344 1
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/* RTC DS1343 Registers */
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#define DS1343_SECONDS_REG 0x00
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#define DS1343_MINUTES_REG 0x01
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#define DS1343_HOURS_REG 0x02
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#define DS1343_DAY_REG 0x03
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#define DS1343_DATE_REG 0x04
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#define DS1343_MONTH_REG 0x05
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#define DS1343_YEAR_REG 0x06
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#define DS1343_ALM0_SEC_REG 0x07
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#define DS1343_ALM0_MIN_REG 0x08
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#define DS1343_ALM0_HOUR_REG 0x09
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#define DS1343_ALM0_DAY_REG 0x0A
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#define DS1343_ALM1_SEC_REG 0x0B
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#define DS1343_ALM1_MIN_REG 0x0C
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#define DS1343_ALM1_HOUR_REG 0x0D
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#define DS1343_ALM1_DAY_REG 0x0E
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#define DS1343_CONTROL_REG 0x0F
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#define DS1343_STATUS_REG 0x10
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#define DS1343_TRICKLE_REG 0x11
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#define DS1343_NVRAM 0x20
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#define DS1343_NVRAM_LEN 96
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/* DS1343 Control Registers bits */
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#define DS1343_EOSC 0x80
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#define DS1343_DOSF 0x20
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#define DS1343_EGFIL 0x10
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#define DS1343_SQW 0x08
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#define DS1343_INTCN 0x04
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#define DS1343_A1IE 0x02
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#define DS1343_A0IE 0x01
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/* DS1343 Status Registers bits */
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#define DS1343_OSF 0x80
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#define DS1343_IRQF1 0x02
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#define DS1343_IRQF0 0x01
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/* DS1343 Trickle Charger Registers bits */
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#define DS1343_TRICKLE_MAGIC 0xa0
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#define DS1343_TRICKLE_DS1 0x08
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#define DS1343_TRICKLE_1K 0x01
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#define DS1343_TRICKLE_2K 0x02
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#define DS1343_TRICKLE_4K 0x03
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static const struct spi_device_id ds1343_id[] = {
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{ "ds1343", DALLAS_MAXIM_DS1343 },
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{ "ds1344", DALLAS_MAXIM_DS1344 },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, ds1343_id);
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struct ds1343_priv {
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struct rtc_device *rtc;
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struct regmap *map;
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int irq;
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};
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static ssize_t ds1343_show_glitchfilter(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct ds1343_priv *priv = dev_get_drvdata(dev->parent);
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int glitch_filt_status, data;
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int res;
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res = regmap_read(priv->map, DS1343_CONTROL_REG, &data);
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if (res)
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return res;
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glitch_filt_status = !!(data & DS1343_EGFIL);
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if (glitch_filt_status)
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return sprintf(buf, "enabled\n");
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else
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return sprintf(buf, "disabled\n");
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}
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static ssize_t ds1343_store_glitchfilter(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct ds1343_priv *priv = dev_get_drvdata(dev->parent);
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int data = 0;
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int res;
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if (strncmp(buf, "enabled", 7) == 0)
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data = DS1343_EGFIL;
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else if (strncmp(buf, "disabled", 8))
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return -EINVAL;
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res = regmap_update_bits(priv->map, DS1343_CONTROL_REG,
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DS1343_EGFIL, data);
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if (res)
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return res;
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return count;
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}
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static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter,
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ds1343_store_glitchfilter);
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static int ds1343_nvram_write(void *priv, unsigned int off, void *val,
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size_t bytes)
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{
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struct ds1343_priv *ds1343 = priv;
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return regmap_bulk_write(ds1343->map, DS1343_NVRAM + off, val, bytes);
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}
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static int ds1343_nvram_read(void *priv, unsigned int off, void *val,
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size_t bytes)
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{
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struct ds1343_priv *ds1343 = priv;
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return regmap_bulk_read(ds1343->map, DS1343_NVRAM + off, val, bytes);
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}
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static ssize_t ds1343_show_tricklecharger(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct ds1343_priv *priv = dev_get_drvdata(dev->parent);
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int res, data;
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char *diodes = "disabled", *resistors = " ";
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res = regmap_read(priv->map, DS1343_TRICKLE_REG, &data);
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if (res)
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return res;
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if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) {
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switch (data & 0x0c) {
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case DS1343_TRICKLE_DS1:
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diodes = "one diode,";
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break;
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default:
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diodes = "no diode,";
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break;
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}
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switch (data & 0x03) {
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case DS1343_TRICKLE_1K:
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resistors = "1k Ohm";
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break;
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case DS1343_TRICKLE_2K:
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resistors = "2k Ohm";
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break;
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case DS1343_TRICKLE_4K:
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resistors = "4k Ohm";
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break;
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default:
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diodes = "disabled";
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break;
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}
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}
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return sprintf(buf, "%s %s\n", diodes, resistors);
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}
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static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL);
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static struct attribute *ds1343_attrs[] = {
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&dev_attr_glitch_filter.attr,
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&dev_attr_trickle_charger.attr,
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NULL
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};
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static const struct attribute_group ds1343_attr_group = {
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.attrs = ds1343_attrs,
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};
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static int ds1343_read_time(struct device *dev, struct rtc_time *dt)
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{
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struct ds1343_priv *priv = dev_get_drvdata(dev);
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unsigned char buf[7];
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int res;
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res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7);
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if (res)
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return res;
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dt->tm_sec = bcd2bin(buf[0]);
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dt->tm_min = bcd2bin(buf[1]);
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dt->tm_hour = bcd2bin(buf[2] & 0x3F);
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dt->tm_wday = bcd2bin(buf[3]) - 1;
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dt->tm_mday = bcd2bin(buf[4]);
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dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1;
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dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */
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return 0;
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}
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static int ds1343_set_time(struct device *dev, struct rtc_time *dt)
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{
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struct ds1343_priv *priv = dev_get_drvdata(dev);
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u8 buf[7];
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buf[0] = bin2bcd(dt->tm_sec);
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buf[1] = bin2bcd(dt->tm_min);
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buf[2] = bin2bcd(dt->tm_hour) & 0x3F;
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buf[3] = bin2bcd(dt->tm_wday + 1);
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buf[4] = bin2bcd(dt->tm_mday);
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buf[5] = bin2bcd(dt->tm_mon + 1);
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buf[6] = bin2bcd(dt->tm_year - 100);
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return regmap_bulk_write(priv->map, DS1343_SECONDS_REG,
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buf, sizeof(buf));
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}
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static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct ds1343_priv *priv = dev_get_drvdata(dev);
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unsigned char buf[4];
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unsigned int val;
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int res;
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if (priv->irq <= 0)
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return -EINVAL;
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res = regmap_read(priv->map, DS1343_STATUS_REG, &val);
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if (res)
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return res;
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alarm->pending = !!(val & DS1343_IRQF0);
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res = regmap_read(priv->map, DS1343_CONTROL_REG, &val);
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if (res)
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return res;
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alarm->enabled = !!(val & DS1343_A0IE);
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res = regmap_bulk_read(priv->map, DS1343_ALM0_SEC_REG, buf, 4);
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if (res)
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return res;
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alarm->time.tm_sec = bcd2bin(buf[0]) & 0x7f;
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alarm->time.tm_min = bcd2bin(buf[1]) & 0x7f;
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alarm->time.tm_hour = bcd2bin(buf[2]) & 0x3f;
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alarm->time.tm_mday = bcd2bin(buf[3]) & 0x3f;
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return 0;
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}
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static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct ds1343_priv *priv = dev_get_drvdata(dev);
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unsigned char buf[4];
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int res = 0;
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if (priv->irq <= 0)
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return -EINVAL;
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res = regmap_update_bits(priv->map, DS1343_CONTROL_REG, DS1343_A0IE, 0);
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if (res)
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return res;
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buf[0] = bin2bcd(alarm->time.tm_sec);
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buf[1] = bin2bcd(alarm->time.tm_min);
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buf[2] = bin2bcd(alarm->time.tm_hour);
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buf[3] = bin2bcd(alarm->time.tm_mday);
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res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4);
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if (res)
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return res;
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if (alarm->enabled)
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res = regmap_update_bits(priv->map, DS1343_CONTROL_REG,
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DS1343_A0IE, DS1343_A0IE);
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return res;
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}
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static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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struct ds1343_priv *priv = dev_get_drvdata(dev);
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if (priv->irq <= 0)
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return -EINVAL;
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return regmap_update_bits(priv->map, DS1343_CONTROL_REG,
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DS1343_A0IE, enabled ? DS1343_A0IE : 0);
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}
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static irqreturn_t ds1343_thread(int irq, void *dev_id)
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{
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struct ds1343_priv *priv = dev_id;
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unsigned int stat;
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int res = 0;
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rtc_lock(priv->rtc);
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res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
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if (res)
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goto out;
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if (stat & DS1343_IRQF0) {
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stat &= ~DS1343_IRQF0;
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regmap_write(priv->map, DS1343_STATUS_REG, stat);
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rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF);
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regmap_update_bits(priv->map, DS1343_CONTROL_REG,
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DS1343_A0IE, 0);
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}
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out:
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rtc_unlock(priv->rtc);
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return IRQ_HANDLED;
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}
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static const struct rtc_class_ops ds1343_rtc_ops = {
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.read_time = ds1343_read_time,
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.set_time = ds1343_set_time,
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.read_alarm = ds1343_read_alarm,
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.set_alarm = ds1343_set_alarm,
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.alarm_irq_enable = ds1343_alarm_irq_enable,
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};
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static int ds1343_probe(struct spi_device *spi)
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{
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struct ds1343_priv *priv;
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struct regmap_config config = { .reg_bits = 8, .val_bits = 8,
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.write_flag_mask = 0x80, };
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unsigned int data;
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int res;
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struct nvmem_config nvmem_cfg = {
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.name = "ds1343-",
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.word_size = 1,
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.stride = 1,
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.size = DS1343_NVRAM_LEN,
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.reg_read = ds1343_nvram_read,
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.reg_write = ds1343_nvram_write,
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};
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priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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/* RTC DS1347 works in spi mode 3 and
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* its chip select is active high. Active high should be defined as
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* "inverse polarity" as GPIO-based chip selects can be logically
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* active high but inverted by the GPIO library.
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*/
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spi->mode |= SPI_MODE_3;
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spi->mode ^= SPI_CS_HIGH;
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spi->bits_per_word = 8;
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res = spi_setup(spi);
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if (res)
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return res;
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spi_set_drvdata(spi, priv);
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priv->map = devm_regmap_init_spi(spi, &config);
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if (IS_ERR(priv->map)) {
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dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n");
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return PTR_ERR(priv->map);
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}
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res = regmap_read(priv->map, DS1343_SECONDS_REG, &data);
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if (res)
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return res;
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regmap_read(priv->map, DS1343_CONTROL_REG, &data);
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data |= DS1343_INTCN;
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data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE);
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regmap_write(priv->map, DS1343_CONTROL_REG, data);
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regmap_read(priv->map, DS1343_STATUS_REG, &data);
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data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0);
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regmap_write(priv->map, DS1343_STATUS_REG, data);
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priv->rtc = devm_rtc_allocate_device(&spi->dev);
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if (IS_ERR(priv->rtc))
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return PTR_ERR(priv->rtc);
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priv->rtc->nvram_old_abi = true;
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priv->rtc->ops = &ds1343_rtc_ops;
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priv->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
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priv->rtc->range_max = RTC_TIMESTAMP_END_2099;
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res = rtc_add_group(priv->rtc, &ds1343_attr_group);
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if (res)
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dev_err(&spi->dev,
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"unable to create sysfs entries for rtc ds1343\n");
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res = rtc_register_device(priv->rtc);
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if (res)
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return res;
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nvmem_cfg.priv = priv;
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rtc_nvmem_register(priv->rtc, &nvmem_cfg);
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priv->irq = spi->irq;
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if (priv->irq >= 0) {
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res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
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ds1343_thread, IRQF_ONESHOT,
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"ds1343", priv);
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if (res) {
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priv->irq = -1;
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dev_err(&spi->dev,
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"unable to request irq for rtc ds1343\n");
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} else {
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device_init_wakeup(&spi->dev, true);
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dev_pm_set_wake_irq(&spi->dev, spi->irq);
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}
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}
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return 0;
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}
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static int ds1343_remove(struct spi_device *spi)
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{
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dev_pm_clear_wake_irq(&spi->dev);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int ds1343_suspend(struct device *dev)
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{
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struct spi_device *spi = to_spi_device(dev);
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if (spi->irq >= 0 && device_may_wakeup(dev))
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enable_irq_wake(spi->irq);
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return 0;
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}
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static int ds1343_resume(struct device *dev)
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{
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struct spi_device *spi = to_spi_device(dev);
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if (spi->irq >= 0 && device_may_wakeup(dev))
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disable_irq_wake(spi->irq);
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return 0;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume);
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static struct spi_driver ds1343_driver = {
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.driver = {
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.name = "ds1343",
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.pm = &ds1343_pm,
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},
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.probe = ds1343_probe,
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.remove = ds1343_remove,
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.id_table = ds1343_id,
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};
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module_spi_driver(ds1343_driver);
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MODULE_DESCRIPTION("DS1343 RTC SPI Driver");
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MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>,"
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"Ankur Srivastava <sankurece@gmail.com>");
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MODULE_LICENSE("GPL v2");
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