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22652ba724
The RTC core is always calling rtc_valid_tm after the read_time callback. It is not necessary to call it just before returning from the callback. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
219 lines
5.8 KiB
C
219 lines
5.8 KiB
C
/*
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* Dallas DS1302 RTC Support
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*
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* Copyright (C) 2002 David McCullough
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* Copyright (C) 2003 - 2007 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License version 2. See the file "COPYING" in the main directory of
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* this archive for more details.
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*/
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#include <linux/bcd.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/rtc.h>
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#include <linux/spi/spi.h>
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#define DRV_NAME "rtc-ds1302"
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#define RTC_CMD_READ 0x81 /* Read command */
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#define RTC_CMD_WRITE 0x80 /* Write command */
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#define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */
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#define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */
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#define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */
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#define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */
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#define RTC_CLCK_BURST 0x1F /* Address of clock burst */
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#define RTC_CLCK_LEN 0x08 /* Size of clock burst */
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#define RTC_ADDR_CTRL 0x07 /* Address of control register */
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#define RTC_ADDR_YEAR 0x06 /* Address of year register */
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#define RTC_ADDR_DAY 0x05 /* Address of day of week register */
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#define RTC_ADDR_MON 0x04 /* Address of month register */
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#define RTC_ADDR_DATE 0x03 /* Address of day of month register */
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#define RTC_ADDR_HOUR 0x02 /* Address of hour register */
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#define RTC_ADDR_MIN 0x01 /* Address of minute register */
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#define RTC_ADDR_SEC 0x00 /* Address of second register */
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static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *time)
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{
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struct spi_device *spi = dev_get_drvdata(dev);
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u8 buf[1 + RTC_CLCK_LEN];
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u8 *bp;
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int status;
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/* Enable writing */
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bp = buf;
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*bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
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*bp++ = RTC_CMD_WRITE_ENABLE;
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status = spi_write_then_read(spi, buf, 2,
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NULL, 0);
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if (status)
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return status;
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/* Write registers starting at the first time/date address. */
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bp = buf;
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*bp++ = RTC_CLCK_BURST << 1 | RTC_CMD_WRITE;
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*bp++ = bin2bcd(time->tm_sec);
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*bp++ = bin2bcd(time->tm_min);
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*bp++ = bin2bcd(time->tm_hour);
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*bp++ = bin2bcd(time->tm_mday);
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*bp++ = bin2bcd(time->tm_mon + 1);
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*bp++ = time->tm_wday + 1;
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*bp++ = bin2bcd(time->tm_year % 100);
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*bp++ = RTC_CMD_WRITE_DISABLE;
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/* use write-then-read since dma from stack is nonportable */
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return spi_write_then_read(spi, buf, sizeof(buf),
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NULL, 0);
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}
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static int ds1302_rtc_get_time(struct device *dev, struct rtc_time *time)
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{
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struct spi_device *spi = dev_get_drvdata(dev);
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u8 addr = RTC_CLCK_BURST << 1 | RTC_CMD_READ;
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u8 buf[RTC_CLCK_LEN - 1];
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int status;
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/* Use write-then-read to get all the date/time registers
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* since dma from stack is nonportable
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*/
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status = spi_write_then_read(spi, &addr, sizeof(addr),
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buf, sizeof(buf));
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if (status < 0)
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return status;
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/* Decode the registers */
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time->tm_sec = bcd2bin(buf[RTC_ADDR_SEC]);
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time->tm_min = bcd2bin(buf[RTC_ADDR_MIN]);
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time->tm_hour = bcd2bin(buf[RTC_ADDR_HOUR]);
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time->tm_wday = buf[RTC_ADDR_DAY] - 1;
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time->tm_mday = bcd2bin(buf[RTC_ADDR_DATE]);
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time->tm_mon = bcd2bin(buf[RTC_ADDR_MON]) - 1;
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time->tm_year = bcd2bin(buf[RTC_ADDR_YEAR]) + 100;
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return 0;
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}
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static const struct rtc_class_ops ds1302_rtc_ops = {
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.read_time = ds1302_rtc_get_time,
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.set_time = ds1302_rtc_set_time,
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};
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static int ds1302_probe(struct spi_device *spi)
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{
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struct rtc_device *rtc;
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u8 addr;
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u8 buf[4];
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u8 *bp;
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int status;
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/* Sanity check board setup data. This may be hooked up
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* in 3wire mode, but we don't care. Note that unless
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* there's an inverter in place, this needs SPI_CS_HIGH!
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*/
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if (spi->bits_per_word && (spi->bits_per_word != 8)) {
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dev_err(&spi->dev, "bad word length\n");
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return -EINVAL;
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} else if (spi->max_speed_hz > 2000000) {
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dev_err(&spi->dev, "speed is too high\n");
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return -EINVAL;
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} else if (spi->mode & SPI_CPHA) {
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dev_err(&spi->dev, "bad mode\n");
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return -EINVAL;
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}
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addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
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status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
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if (status < 0) {
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dev_err(&spi->dev, "control register read error %d\n",
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status);
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return status;
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}
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if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
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status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
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if (status < 0) {
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dev_err(&spi->dev, "control register read error %d\n",
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status);
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return status;
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}
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if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
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dev_err(&spi->dev, "junk in control register\n");
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return -ENODEV;
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}
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}
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if (buf[0] == 0) {
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bp = buf;
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*bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
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*bp++ = RTC_CMD_WRITE_DISABLE;
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status = spi_write_then_read(spi, buf, 2, NULL, 0);
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if (status < 0) {
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dev_err(&spi->dev, "control register write error %d\n",
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status);
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return status;
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}
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addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
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status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
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if (status < 0) {
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dev_err(&spi->dev,
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"error %d reading control register\n",
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status);
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return status;
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}
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if (buf[0] != RTC_CMD_WRITE_DISABLE) {
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dev_err(&spi->dev, "failed to detect chip\n");
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return -ENODEV;
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}
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}
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spi_set_drvdata(spi, spi);
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rtc = devm_rtc_device_register(&spi->dev, "ds1302",
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&ds1302_rtc_ops, THIS_MODULE);
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if (IS_ERR(rtc)) {
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status = PTR_ERR(rtc);
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dev_err(&spi->dev, "error %d registering rtc\n", status);
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return status;
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}
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return 0;
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}
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static int ds1302_remove(struct spi_device *spi)
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{
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spi_set_drvdata(spi, NULL);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id ds1302_dt_ids[] = {
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{ .compatible = "maxim,ds1302", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, ds1302_dt_ids);
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#endif
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static struct spi_driver ds1302_driver = {
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.driver.name = "rtc-ds1302",
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.driver.of_match_table = of_match_ptr(ds1302_dt_ids),
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.probe = ds1302_probe,
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.remove = ds1302_remove,
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};
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module_spi_driver(ds1302_driver);
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MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
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MODULE_AUTHOR("Paul Mundt, David McCullough");
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MODULE_LICENSE("GPL v2");
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