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209b43759d
Use the standard WARN_ON instead. If a small kernel is desired, WARN_ON can be disabled globally. Also remove SSB_DEBUG. Besides WARN_ON it only adds a tiny debug check. Include this check unconditionally. Signed-off-by: Michael Buesch <m@bues.ch> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
211 lines
4.5 KiB
C
211 lines
4.5 KiB
C
/*
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* Sonics Silicon Backplane SoC host related functions.
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* Subsystem core
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*
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* Copyright 2005, Broadcom Corporation
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* Copyright 2006, 2007, Michael Buesch <m@bues.ch>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include "ssb_private.h"
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#include <linux/bcm47xx_nvram.h>
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#include <linux/ssb/ssb.h>
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static u8 ssb_host_soc_read8(struct ssb_device *dev, u16 offset)
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{
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struct ssb_bus *bus = dev->bus;
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offset += dev->core_index * SSB_CORE_SIZE;
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return readb(bus->mmio + offset);
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}
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static u16 ssb_host_soc_read16(struct ssb_device *dev, u16 offset)
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{
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struct ssb_bus *bus = dev->bus;
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offset += dev->core_index * SSB_CORE_SIZE;
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return readw(bus->mmio + offset);
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}
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static u32 ssb_host_soc_read32(struct ssb_device *dev, u16 offset)
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{
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struct ssb_bus *bus = dev->bus;
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offset += dev->core_index * SSB_CORE_SIZE;
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return readl(bus->mmio + offset);
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}
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#ifdef CONFIG_SSB_BLOCKIO
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static void ssb_host_soc_block_read(struct ssb_device *dev, void *buffer,
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size_t count, u16 offset, u8 reg_width)
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{
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struct ssb_bus *bus = dev->bus;
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void __iomem *addr;
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offset += dev->core_index * SSB_CORE_SIZE;
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addr = bus->mmio + offset;
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switch (reg_width) {
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case sizeof(u8): {
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u8 *buf = buffer;
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while (count) {
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*buf = __raw_readb(addr);
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buf++;
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count--;
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}
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break;
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}
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case sizeof(u16): {
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__le16 *buf = buffer;
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WARN_ON(count & 1);
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while (count) {
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*buf = (__force __le16)__raw_readw(addr);
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buf++;
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count -= 2;
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}
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break;
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}
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case sizeof(u32): {
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__le32 *buf = buffer;
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WARN_ON(count & 3);
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while (count) {
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*buf = (__force __le32)__raw_readl(addr);
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buf++;
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count -= 4;
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}
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break;
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}
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default:
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WARN_ON(1);
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}
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}
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#endif /* CONFIG_SSB_BLOCKIO */
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static void ssb_host_soc_write8(struct ssb_device *dev, u16 offset, u8 value)
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{
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struct ssb_bus *bus = dev->bus;
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offset += dev->core_index * SSB_CORE_SIZE;
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writeb(value, bus->mmio + offset);
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}
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static void ssb_host_soc_write16(struct ssb_device *dev, u16 offset, u16 value)
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{
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struct ssb_bus *bus = dev->bus;
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offset += dev->core_index * SSB_CORE_SIZE;
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writew(value, bus->mmio + offset);
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}
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static void ssb_host_soc_write32(struct ssb_device *dev, u16 offset, u32 value)
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{
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struct ssb_bus *bus = dev->bus;
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offset += dev->core_index * SSB_CORE_SIZE;
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writel(value, bus->mmio + offset);
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}
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#ifdef CONFIG_SSB_BLOCKIO
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static void ssb_host_soc_block_write(struct ssb_device *dev, const void *buffer,
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size_t count, u16 offset, u8 reg_width)
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{
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struct ssb_bus *bus = dev->bus;
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void __iomem *addr;
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offset += dev->core_index * SSB_CORE_SIZE;
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addr = bus->mmio + offset;
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switch (reg_width) {
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case sizeof(u8): {
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const u8 *buf = buffer;
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while (count) {
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__raw_writeb(*buf, addr);
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buf++;
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count--;
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}
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break;
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}
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case sizeof(u16): {
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const __le16 *buf = buffer;
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WARN_ON(count & 1);
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while (count) {
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__raw_writew((__force u16)(*buf), addr);
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buf++;
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count -= 2;
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}
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break;
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}
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case sizeof(u32): {
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const __le32 *buf = buffer;
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WARN_ON(count & 3);
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while (count) {
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__raw_writel((__force u32)(*buf), addr);
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buf++;
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count -= 4;
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}
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break;
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}
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default:
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WARN_ON(1);
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}
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}
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#endif /* CONFIG_SSB_BLOCKIO */
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/* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
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const struct ssb_bus_ops ssb_host_soc_ops = {
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.read8 = ssb_host_soc_read8,
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.read16 = ssb_host_soc_read16,
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.read32 = ssb_host_soc_read32,
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.write8 = ssb_host_soc_write8,
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.write16 = ssb_host_soc_write16,
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.write32 = ssb_host_soc_write32,
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#ifdef CONFIG_SSB_BLOCKIO
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.block_read = ssb_host_soc_block_read,
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.block_write = ssb_host_soc_block_write,
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#endif
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};
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int ssb_host_soc_get_invariants(struct ssb_bus *bus,
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struct ssb_init_invariants *iv)
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{
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char buf[20];
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int len, err;
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/* Fill boardinfo structure */
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memset(&iv->boardinfo, 0, sizeof(struct ssb_boardinfo));
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len = bcm47xx_nvram_getenv("boardvendor", buf, sizeof(buf));
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if (len > 0) {
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err = kstrtou16(strim(buf), 0, &iv->boardinfo.vendor);
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if (err)
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pr_warn("Couldn't parse nvram board vendor entry with value \"%s\"\n",
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buf);
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}
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if (!iv->boardinfo.vendor)
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iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
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len = bcm47xx_nvram_getenv("boardtype", buf, sizeof(buf));
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if (len > 0) {
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err = kstrtou16(strim(buf), 0, &iv->boardinfo.type);
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if (err)
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pr_warn("Couldn't parse nvram board type entry with value \"%s\"\n",
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buf);
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}
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memset(&iv->sprom, 0, sizeof(struct ssb_sprom));
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ssb_fill_sprom_with_fallback(bus, &iv->sprom);
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if (bcm47xx_nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
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iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
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return 0;
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}
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