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21dcd300b1
The current BT retry/reset mechanism fails to succeed on a PowerEdge 1650, when the controller is wedged with B2H_ATN asserted at XACTION_START. If this occurs, no further commands will ever succeed unless the state of the controller is first cleared out. Furthermore, the soft reset would only occur if the first command after insmod was the one that timed out, not if a later command timed out. This patch changes the retry/reset mechanism to be as follows: Before retrying a command, clear the state of the BT controller such that the flags represent ready for a new transaction. This increases the chance of success of the restarted transaction. After 2 retries, issue a soft reset and retry one more time before giving up and reporting back a failure. Signed-off-by: Matt Domsch <Matt_Domsch@dell.com> Acked-by: Rocky Craig <rocky.craig@hp.com> Signed-off-by: Corey Minyard <minyard@acm.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
524 lines
16 KiB
C
524 lines
16 KiB
C
/*
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* ipmi_bt_sm.c
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*
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* The state machine for an Open IPMI BT sub-driver under ipmi_si.c, part
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* of the driver architecture at http://sourceforge.net/project/openipmi
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*
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* Author: Rocky Craig <first.last@hp.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
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* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include <linux/kernel.h> /* For printk. */
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#include <linux/string.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/ipmi_msgdefs.h> /* for completion codes */
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#include "ipmi_si_sm.h"
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static int bt_debug = 0x00; /* Production value 0, see following flags */
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#define BT_DEBUG_ENABLE 1
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#define BT_DEBUG_MSG 2
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#define BT_DEBUG_STATES 4
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module_param(bt_debug, int, 0644);
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MODULE_PARM_DESC(bt_debug, "debug bitmask, 1=enable, 2=messages, 4=states");
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/* Typical "Get BT Capabilities" values are 2-3 retries, 5-10 seconds,
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and 64 byte buffers. However, one HP implementation wants 255 bytes of
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buffer (with a documented message of 160 bytes) so go for the max.
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Since the Open IPMI architecture is single-message oriented at this
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stage, the queue depth of BT is of no concern. */
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#define BT_NORMAL_TIMEOUT 5000000 /* seconds in microseconds */
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#define BT_RETRY_LIMIT 2
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#define BT_RESET_DELAY 6000000 /* 6 seconds after warm reset */
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enum bt_states {
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BT_STATE_IDLE,
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BT_STATE_XACTION_START,
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BT_STATE_WRITE_BYTES,
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BT_STATE_WRITE_END,
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BT_STATE_WRITE_CONSUME,
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BT_STATE_B2H_WAIT,
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BT_STATE_READ_END,
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BT_STATE_RESET1, /* These must come last */
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BT_STATE_RESET2,
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BT_STATE_RESET3,
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BT_STATE_RESTART,
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BT_STATE_HOSED
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};
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struct si_sm_data {
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enum bt_states state;
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enum bt_states last_state; /* assist printing and resets */
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unsigned char seq; /* BT sequence number */
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struct si_sm_io *io;
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unsigned char write_data[IPMI_MAX_MSG_LENGTH];
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int write_count;
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unsigned char read_data[IPMI_MAX_MSG_LENGTH];
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int read_count;
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int truncated;
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long timeout;
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unsigned int error_retries; /* end of "common" fields */
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int nonzero_status; /* hung BMCs stay all 0 */
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};
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#define BT_CLR_WR_PTR 0x01 /* See IPMI 1.5 table 11.6.4 */
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#define BT_CLR_RD_PTR 0x02
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#define BT_H2B_ATN 0x04
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#define BT_B2H_ATN 0x08
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#define BT_SMS_ATN 0x10
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#define BT_OEM0 0x20
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#define BT_H_BUSY 0x40
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#define BT_B_BUSY 0x80
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/* Some bits are toggled on each write: write once to set it, once
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more to clear it; writing a zero does nothing. To absolutely
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clear it, check its state and write if set. This avoids the "get
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current then use as mask" scheme to modify one bit. Note that the
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variable "bt" is hardcoded into these macros. */
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#define BT_STATUS bt->io->inputb(bt->io, 0)
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#define BT_CONTROL(x) bt->io->outputb(bt->io, 0, x)
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#define BMC2HOST bt->io->inputb(bt->io, 1)
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#define HOST2BMC(x) bt->io->outputb(bt->io, 1, x)
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#define BT_INTMASK_R bt->io->inputb(bt->io, 2)
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#define BT_INTMASK_W(x) bt->io->outputb(bt->io, 2, x)
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/* Convenience routines for debugging. These are not multi-open safe!
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Note the macros have hardcoded variables in them. */
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static char *state2txt(unsigned char state)
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{
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switch (state) {
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case BT_STATE_IDLE: return("IDLE");
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case BT_STATE_XACTION_START: return("XACTION");
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case BT_STATE_WRITE_BYTES: return("WR_BYTES");
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case BT_STATE_WRITE_END: return("WR_END");
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case BT_STATE_WRITE_CONSUME: return("WR_CONSUME");
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case BT_STATE_B2H_WAIT: return("B2H_WAIT");
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case BT_STATE_READ_END: return("RD_END");
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case BT_STATE_RESET1: return("RESET1");
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case BT_STATE_RESET2: return("RESET2");
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case BT_STATE_RESET3: return("RESET3");
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case BT_STATE_RESTART: return("RESTART");
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case BT_STATE_HOSED: return("HOSED");
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}
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return("BAD STATE");
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}
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#define STATE2TXT state2txt(bt->state)
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static char *status2txt(unsigned char status, char *buf)
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{
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strcpy(buf, "[ ");
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if (status & BT_B_BUSY) strcat(buf, "B_BUSY ");
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if (status & BT_H_BUSY) strcat(buf, "H_BUSY ");
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if (status & BT_OEM0) strcat(buf, "OEM0 ");
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if (status & BT_SMS_ATN) strcat(buf, "SMS ");
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if (status & BT_B2H_ATN) strcat(buf, "B2H ");
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if (status & BT_H2B_ATN) strcat(buf, "H2B ");
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strcat(buf, "]");
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return buf;
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}
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#define STATUS2TXT(buf) status2txt(status, buf)
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/* This will be called from within this module on a hosed condition */
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#define FIRST_SEQ 0
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static unsigned int bt_init_data(struct si_sm_data *bt, struct si_sm_io *io)
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{
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bt->state = BT_STATE_IDLE;
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bt->last_state = BT_STATE_IDLE;
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bt->seq = FIRST_SEQ;
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bt->io = io;
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bt->write_count = 0;
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bt->read_count = 0;
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bt->error_retries = 0;
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bt->nonzero_status = 0;
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bt->truncated = 0;
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bt->timeout = BT_NORMAL_TIMEOUT;
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return 3; /* We claim 3 bytes of space; ought to check SPMI table */
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}
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static int bt_start_transaction(struct si_sm_data *bt,
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unsigned char *data,
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unsigned int size)
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{
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unsigned int i;
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if ((size < 2) || (size > IPMI_MAX_MSG_LENGTH))
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return -1;
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if ((bt->state != BT_STATE_IDLE) && (bt->state != BT_STATE_HOSED))
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return -2;
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if (bt_debug & BT_DEBUG_MSG) {
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printk(KERN_WARNING "+++++++++++++++++++++++++++++++++++++\n");
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printk(KERN_WARNING "BT: write seq=0x%02X:", bt->seq);
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for (i = 0; i < size; i ++)
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printk (" %02x", data[i]);
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printk("\n");
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}
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bt->write_data[0] = size + 1; /* all data plus seq byte */
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bt->write_data[1] = *data; /* NetFn/LUN */
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bt->write_data[2] = bt->seq;
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memcpy(bt->write_data + 3, data + 1, size - 1);
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bt->write_count = size + 2;
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bt->error_retries = 0;
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bt->nonzero_status = 0;
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bt->read_count = 0;
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bt->truncated = 0;
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bt->state = BT_STATE_XACTION_START;
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bt->last_state = BT_STATE_IDLE;
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bt->timeout = BT_NORMAL_TIMEOUT;
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return 0;
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}
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/* After the upper state machine has been told SI_SM_TRANSACTION_COMPLETE
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it calls this. Strip out the length and seq bytes. */
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static int bt_get_result(struct si_sm_data *bt,
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unsigned char *data,
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unsigned int length)
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{
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int i, msg_len;
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msg_len = bt->read_count - 2; /* account for length & seq */
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/* Always NetFn, Cmd, cCode */
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if (msg_len < 3 || msg_len > IPMI_MAX_MSG_LENGTH) {
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printk(KERN_DEBUG "BT results: bad msg_len = %d\n", msg_len);
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data[0] = bt->write_data[1] | 0x4; /* Kludge a response */
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data[1] = bt->write_data[3];
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data[2] = IPMI_ERR_UNSPECIFIED;
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msg_len = 3;
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} else {
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data[0] = bt->read_data[1];
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data[1] = bt->read_data[3];
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if (length < msg_len)
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bt->truncated = 1;
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if (bt->truncated) { /* can be set in read_all_bytes() */
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data[2] = IPMI_ERR_MSG_TRUNCATED;
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msg_len = 3;
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} else
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memcpy(data + 2, bt->read_data + 4, msg_len - 2);
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if (bt_debug & BT_DEBUG_MSG) {
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printk (KERN_WARNING "BT: res (raw)");
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for (i = 0; i < msg_len; i++)
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printk(" %02x", data[i]);
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printk ("\n");
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}
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}
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bt->read_count = 0; /* paranoia */
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return msg_len;
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}
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/* This bit's functionality is optional */
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#define BT_BMC_HWRST 0x80
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static void reset_flags(struct si_sm_data *bt)
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{
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if (BT_STATUS & BT_H_BUSY)
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BT_CONTROL(BT_H_BUSY);
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if (BT_STATUS & BT_B_BUSY)
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BT_CONTROL(BT_B_BUSY);
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BT_CONTROL(BT_CLR_WR_PTR);
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BT_CONTROL(BT_SMS_ATN);
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if (BT_STATUS & BT_B2H_ATN) {
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int i;
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BT_CONTROL(BT_H_BUSY);
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BT_CONTROL(BT_B2H_ATN);
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BT_CONTROL(BT_CLR_RD_PTR);
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for (i = 0; i < IPMI_MAX_MSG_LENGTH + 2; i++)
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BMC2HOST;
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BT_CONTROL(BT_H_BUSY);
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}
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}
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static inline void write_all_bytes(struct si_sm_data *bt)
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{
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int i;
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if (bt_debug & BT_DEBUG_MSG) {
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printk(KERN_WARNING "BT: write %d bytes seq=0x%02X",
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bt->write_count, bt->seq);
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for (i = 0; i < bt->write_count; i++)
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printk (" %02x", bt->write_data[i]);
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printk ("\n");
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}
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for (i = 0; i < bt->write_count; i++)
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HOST2BMC(bt->write_data[i]);
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}
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static inline int read_all_bytes(struct si_sm_data *bt)
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{
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unsigned char i;
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bt->read_data[0] = BMC2HOST;
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bt->read_count = bt->read_data[0];
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if (bt_debug & BT_DEBUG_MSG)
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printk(KERN_WARNING "BT: read %d bytes:", bt->read_count);
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/* minimum: length, NetFn, Seq, Cmd, cCode == 5 total, or 4 more
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following the length byte. */
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if (bt->read_count < 4 || bt->read_count >= IPMI_MAX_MSG_LENGTH) {
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if (bt_debug & BT_DEBUG_MSG)
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printk("bad length %d\n", bt->read_count);
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bt->truncated = 1;
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return 1; /* let next XACTION START clean it up */
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}
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for (i = 1; i <= bt->read_count; i++)
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bt->read_data[i] = BMC2HOST;
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bt->read_count++; /* account for the length byte */
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if (bt_debug & BT_DEBUG_MSG) {
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for (i = 0; i < bt->read_count; i++)
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printk (" %02x", bt->read_data[i]);
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printk ("\n");
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}
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if (bt->seq != bt->write_data[2]) /* idiot check */
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printk(KERN_DEBUG "BT: internal error: sequence mismatch\n");
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/* per the spec, the (NetFn, Seq, Cmd) tuples should match */
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if ((bt->read_data[3] == bt->write_data[3]) && /* Cmd */
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(bt->read_data[2] == bt->write_data[2]) && /* Sequence */
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((bt->read_data[1] & 0xF8) == (bt->write_data[1] & 0xF8)))
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return 1;
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if (bt_debug & BT_DEBUG_MSG)
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printk(KERN_WARNING "BT: bad packet: "
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"want 0x(%02X, %02X, %02X) got (%02X, %02X, %02X)\n",
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bt->write_data[1], bt->write_data[2], bt->write_data[3],
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bt->read_data[1], bt->read_data[2], bt->read_data[3]);
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return 0;
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}
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/* Modifies bt->state appropriately, need to get into the bt_event() switch */
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static void error_recovery(struct si_sm_data *bt, char *reason)
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{
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unsigned char status;
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char buf[40]; /* For getting status */
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bt->timeout = BT_NORMAL_TIMEOUT; /* various places want to retry */
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status = BT_STATUS;
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printk(KERN_DEBUG "BT: %s in %s %s\n", reason, STATE2TXT,
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STATUS2TXT(buf));
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(bt->error_retries)++;
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if (bt->error_retries > BT_RETRY_LIMIT) {
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printk(KERN_DEBUG "retry limit (%d) exceeded\n", BT_RETRY_LIMIT);
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bt->state = BT_STATE_HOSED;
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if (!bt->nonzero_status)
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printk(KERN_ERR "IPMI: BT stuck, try power cycle\n");
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else if (bt->error_retries <= BT_RETRY_LIMIT + 1) {
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printk(KERN_DEBUG "IPMI: BT reset (takes 5 secs)\n");
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bt->state = BT_STATE_RESET1;
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}
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return;
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}
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/* Sometimes the BMC queues get in an "off-by-one" state...*/
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if ((bt->state == BT_STATE_B2H_WAIT) && (status & BT_B2H_ATN)) {
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printk(KERN_DEBUG "retry B2H_WAIT\n");
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return;
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}
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printk(KERN_DEBUG "restart command\n");
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bt->state = BT_STATE_RESTART;
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}
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/* Check the status and (possibly) advance the BT state machine. The
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default return is SI_SM_CALL_WITH_DELAY. */
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static enum si_sm_result bt_event(struct si_sm_data *bt, long time)
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{
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unsigned char status;
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char buf[40]; /* For getting status */
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int i;
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status = BT_STATUS;
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bt->nonzero_status |= status;
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if ((bt_debug & BT_DEBUG_STATES) && (bt->state != bt->last_state))
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printk(KERN_WARNING "BT: %s %s TO=%ld - %ld \n",
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STATE2TXT,
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STATUS2TXT(buf),
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bt->timeout,
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time);
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bt->last_state = bt->state;
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if (bt->state == BT_STATE_HOSED)
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return SI_SM_HOSED;
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if (bt->state != BT_STATE_IDLE) { /* do timeout test */
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bt->timeout -= time;
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if ((bt->timeout < 0) && (bt->state < BT_STATE_RESET1)) {
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error_recovery(bt, "timed out");
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return SI_SM_CALL_WITHOUT_DELAY;
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}
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}
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switch (bt->state) {
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case BT_STATE_IDLE: /* check for asynchronous messages */
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if (status & BT_SMS_ATN) {
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BT_CONTROL(BT_SMS_ATN); /* clear it */
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return SI_SM_ATTN;
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}
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return SI_SM_IDLE;
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case BT_STATE_XACTION_START:
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if (status & BT_H_BUSY) {
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BT_CONTROL(BT_H_BUSY);
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break;
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}
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if (status & BT_B2H_ATN)
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break;
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bt->state = BT_STATE_WRITE_BYTES;
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return SI_SM_CALL_WITHOUT_DELAY; /* for logging */
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case BT_STATE_WRITE_BYTES:
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if (status & (BT_B_BUSY | BT_H2B_ATN))
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break;
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BT_CONTROL(BT_CLR_WR_PTR);
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write_all_bytes(bt);
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BT_CONTROL(BT_H2B_ATN); /* clears too fast to catch? */
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bt->state = BT_STATE_WRITE_CONSUME;
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return SI_SM_CALL_WITHOUT_DELAY; /* it MIGHT sail through */
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case BT_STATE_WRITE_CONSUME: /* BMCs usually blow right thru here */
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if (status & (BT_H2B_ATN | BT_B_BUSY))
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break;
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bt->state = BT_STATE_B2H_WAIT;
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/* fall through with status */
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/* Stay in BT_STATE_B2H_WAIT until a packet matches. However, spinning
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hard here, constantly reading status, seems to hold off the
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generation of B2H_ATN so ALWAYS return CALL_WITH_DELAY. */
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case BT_STATE_B2H_WAIT:
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if (!(status & BT_B2H_ATN))
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break;
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/* Assume ordered, uncached writes: no need to wait */
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if (!(status & BT_H_BUSY))
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BT_CONTROL(BT_H_BUSY); /* set */
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BT_CONTROL(BT_B2H_ATN); /* clear it, ACK to the BMC */
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BT_CONTROL(BT_CLR_RD_PTR); /* reset the queue */
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i = read_all_bytes(bt);
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BT_CONTROL(BT_H_BUSY); /* clear */
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if (!i) /* Try this state again */
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break;
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bt->state = BT_STATE_READ_END;
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return SI_SM_CALL_WITHOUT_DELAY; /* for logging */
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case BT_STATE_READ_END:
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/* I could wait on BT_H_BUSY to go clear for a truly clean
|
|
exit. However, this is already done in XACTION_START
|
|
and the (possible) extra loop/status/possible wait affects
|
|
performance. So, as long as it works, just ignore H_BUSY */
|
|
|
|
#ifdef MAKE_THIS_TRUE_IF_NECESSARY
|
|
|
|
if (status & BT_H_BUSY)
|
|
break;
|
|
#endif
|
|
bt->seq++;
|
|
bt->state = BT_STATE_IDLE;
|
|
return SI_SM_TRANSACTION_COMPLETE;
|
|
|
|
case BT_STATE_RESET1:
|
|
reset_flags(bt);
|
|
bt->timeout = BT_RESET_DELAY;
|
|
bt->state = BT_STATE_RESET2;
|
|
break;
|
|
|
|
case BT_STATE_RESET2: /* Send a soft reset */
|
|
BT_CONTROL(BT_CLR_WR_PTR);
|
|
HOST2BMC(3); /* number of bytes following */
|
|
HOST2BMC(0x18); /* NetFn/LUN == Application, LUN 0 */
|
|
HOST2BMC(42); /* Sequence number */
|
|
HOST2BMC(3); /* Cmd == Soft reset */
|
|
BT_CONTROL(BT_H2B_ATN);
|
|
bt->state = BT_STATE_RESET3;
|
|
break;
|
|
|
|
case BT_STATE_RESET3:
|
|
if (bt->timeout > 0)
|
|
return SI_SM_CALL_WITH_DELAY;
|
|
bt->state = BT_STATE_RESTART; /* printk in debug modes */
|
|
break;
|
|
|
|
case BT_STATE_RESTART: /* don't reset retries! */
|
|
reset_flags(bt);
|
|
bt->write_data[2] = ++bt->seq;
|
|
bt->read_count = 0;
|
|
bt->nonzero_status = 0;
|
|
bt->timeout = BT_NORMAL_TIMEOUT;
|
|
bt->state = BT_STATE_XACTION_START;
|
|
break;
|
|
|
|
default: /* HOSED is supposed to be caught much earlier */
|
|
error_recovery(bt, "internal logic error");
|
|
break;
|
|
}
|
|
return SI_SM_CALL_WITH_DELAY;
|
|
}
|
|
|
|
static int bt_detect(struct si_sm_data *bt)
|
|
{
|
|
/* It's impossible for the BT status and interrupt registers to be
|
|
all 1's, (assuming a properly functioning, self-initialized BMC)
|
|
but that's what you get from reading a bogus address, so we
|
|
test that first. The calling routine uses negative logic. */
|
|
|
|
if ((BT_STATUS == 0xFF) && (BT_INTMASK_R == 0xFF))
|
|
return 1;
|
|
reset_flags(bt);
|
|
return 0;
|
|
}
|
|
|
|
static void bt_cleanup(struct si_sm_data *bt)
|
|
{
|
|
}
|
|
|
|
static int bt_size(void)
|
|
{
|
|
return sizeof(struct si_sm_data);
|
|
}
|
|
|
|
struct si_sm_handlers bt_smi_handlers =
|
|
{
|
|
.init_data = bt_init_data,
|
|
.start_transaction = bt_start_transaction,
|
|
.get_result = bt_get_result,
|
|
.event = bt_event,
|
|
.detect = bt_detect,
|
|
.cleanup = bt_cleanup,
|
|
.size = bt_size,
|
|
};
|