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30d88c0e3a
It is possible to take an IRQ from EL0 following a branch to a kernel address in such a way that the IRQ is prioritised over the instruction abort. Whilst an attacker would need to get the stars to align here, it might be sufficient with enough calibration so perform BP hardening in the rare case that we see a kernel address in the ELR when handling an IRQ from EL0. Reported-by: Dan Hettena <dhettena@nvidia.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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boot | ||
configs | ||
crypto | ||
include | ||
kernel | ||
kvm | ||
lib | ||
mm | ||
net | ||
xen | ||
Kconfig | ||
Kconfig.debug | ||
Kconfig.platforms | ||
Makefile |