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80018bd9cb
The chip is also an 8 bit shift register which works out of the box as a GPO expander with this patch Signed-off-by: Nicolas Saenz Julienne <nicolassaenzj@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
25 lines
651 B
Plaintext
25 lines
651 B
Plaintext
* Generic 8-bits shift register GPIO driver
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Required properties:
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- compatible: Should contain one of the following:
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"fairchild,74hc595"
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"nxp,74lvc594"
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- reg : chip select number
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- gpio-controller : Marks the device node as a gpio controller.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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- registers-number: Number of daisy-chained shift registers
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Example:
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gpio5: gpio5@0 {
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compatible = "fairchild,74hc595";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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registers-number = <4>;
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spi-max-frequency = <100000>;
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};
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