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We should prefer accessing CSRs using their CSR numbers because: 1. It compiles fine with older toolchains. 2. We can use latest CSR names in #define macro names of CSR numbers as-per RISC-V spec. 3. We can access newly added CSRs even if toolchain does not recognize newly addes CSRs by name. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
64 lines
1.6 KiB
C
64 lines
1.6 KiB
C
/*
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* Copyright (C) 2012 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ASM_RISCV_IRQFLAGS_H
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#define _ASM_RISCV_IRQFLAGS_H
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#include <asm/processor.h>
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#include <asm/csr.h>
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/* read interrupt enabled status */
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static inline unsigned long arch_local_save_flags(void)
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{
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return csr_read(CSR_SSTATUS);
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}
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/* unconditionally enable interrupts */
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static inline void arch_local_irq_enable(void)
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{
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csr_set(CSR_SSTATUS, SR_SIE);
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}
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/* unconditionally disable interrupts */
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static inline void arch_local_irq_disable(void)
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{
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csr_clear(CSR_SSTATUS, SR_SIE);
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}
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/* get status and disable interrupts */
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static inline unsigned long arch_local_irq_save(void)
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{
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return csr_read_clear(CSR_SSTATUS, SR_SIE);
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}
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/* test flags */
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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return !(flags & SR_SIE);
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}
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/* test hardware interrupt enable bit */
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static inline int arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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/* set interrupt enabled status */
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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csr_set(CSR_SSTATUS, flags & SR_SIE);
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}
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#endif /* _ASM_RISCV_IRQFLAGS_H */
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