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2f9ac29eec
This change enables unaligned userspace memory access via a kernel fast path on tilegx. The kernel tracks user PC/instruction pairs per-thread using a direct-mapped cache in userspace. The cache maps those PC/instruction pairs to JIT'ed instruction sequences that load or store using byte-wide load store intructions and then synthesize 2-, 4- or 8-byte load or store results. Once an instruction has been seen to generate an unaligned access once, subsequent hits on that instruction typically require overhead of only around 50 cycles if cache and TLB is hot. We support the prctl() PR_GET_UNALIGN / PR_SET_UNALIGN sys call to enable or disable unaligned fixups on a per-process basis. To do this we pull some of the tilepro unaligned support out of the single_step.c file; tilepro uses instruction disassembly for both single-step and unaligned access support. Since tilegx actually has hardware singlestep support, though, it's cleaner to keep the tilegx unaligned access code in a separate file. While we're at it, properly rename the tilepro-specific types, etc., to have tilepro suffixes instead of generic tile suffixes. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
293 lines
7.2 KiB
C
293 lines
7.2 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*
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* Copied from i386: Ross Biro 1/23/92
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*/
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#include <linux/kernel.h>
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#include <linux/ptrace.h>
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#include <linux/kprobes.h>
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#include <linux/compat.h>
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#include <linux/uaccess.h>
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#include <linux/regset.h>
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#include <linux/elf.h>
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#include <linux/tracehook.h>
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#include <asm/traps.h>
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#include <arch/chip.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/syscalls.h>
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void user_enable_single_step(struct task_struct *child)
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{
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set_tsk_thread_flag(child, TIF_SINGLESTEP);
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}
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void user_disable_single_step(struct task_struct *child)
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{
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clear_tsk_thread_flag(child, TIF_SINGLESTEP);
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}
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/*
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* Called by kernel/ptrace.c when detaching..
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*/
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void ptrace_disable(struct task_struct *child)
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{
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clear_tsk_thread_flag(child, TIF_SINGLESTEP);
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/*
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* These two are currently unused, but will be set by arch_ptrace()
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* and used in the syscall assembly when we do support them.
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*/
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clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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}
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/*
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* Get registers from task and ready the result for userspace.
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* Note that we localize the API issues to getregs() and putregs() at
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* some cost in performance, e.g. we need a full pt_regs copy for
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* PEEKUSR, and two copies for POKEUSR. But in general we expect
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* GETREGS/PUTREGS to be the API of choice anyway.
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*/
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static char *getregs(struct task_struct *child, struct pt_regs *uregs)
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{
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*uregs = *task_pt_regs(child);
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/* Set up flags ABI bits. */
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uregs->flags = 0;
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#ifdef CONFIG_COMPAT
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if (task_thread_info(child)->status & TS_COMPAT)
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uregs->flags |= PT_FLAGS_COMPAT;
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#endif
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return (char *)uregs;
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}
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/* Put registers back to task. */
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static void putregs(struct task_struct *child, struct pt_regs *uregs)
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{
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struct pt_regs *regs = task_pt_regs(child);
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/* Don't allow overwriting the kernel-internal flags word. */
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uregs->flags = regs->flags;
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/* Only allow setting the ICS bit in the ex1 word. */
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uregs->ex1 = PL_ICS_EX1(USER_PL, EX1_ICS(uregs->ex1));
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*regs = *uregs;
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}
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enum tile_regset {
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REGSET_GPR,
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};
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static int tile_gpr_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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struct pt_regs regs;
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getregs(target, ®s);
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf, ®s, 0,
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sizeof(regs));
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}
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static int tile_gpr_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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struct pt_regs regs;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ®s, 0,
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sizeof(regs));
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if (ret)
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return ret;
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putregs(target, ®s);
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return 0;
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}
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static const struct user_regset tile_user_regset[] = {
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[REGSET_GPR] = {
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.core_note_type = NT_PRSTATUS,
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.n = ELF_NGREG,
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.size = sizeof(elf_greg_t),
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.align = sizeof(elf_greg_t),
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.get = tile_gpr_get,
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.set = tile_gpr_set,
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},
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};
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static const struct user_regset_view tile_user_regset_view = {
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.name = CHIP_ARCH_NAME,
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.e_machine = ELF_ARCH,
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.ei_osabi = ELF_OSABI,
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.regsets = tile_user_regset,
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.n = ARRAY_SIZE(tile_user_regset),
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};
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const struct user_regset_view *task_user_regset_view(struct task_struct *task)
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{
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return &tile_user_regset_view;
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}
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long arch_ptrace(struct task_struct *child, long request,
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unsigned long addr, unsigned long data)
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{
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unsigned long __user *datap = (long __user __force *)data;
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unsigned long tmp;
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long ret = -EIO;
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char *childreg;
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struct pt_regs copyregs;
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switch (request) {
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case PTRACE_PEEKUSR: /* Read register from pt_regs. */
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if (addr >= PTREGS_SIZE)
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break;
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childreg = getregs(child, ©regs) + addr;
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#ifdef CONFIG_COMPAT
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if (is_compat_task()) {
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if (addr & (sizeof(compat_long_t)-1))
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break;
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ret = put_user(*(compat_long_t *)childreg,
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(compat_long_t __user *)datap);
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} else
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#endif
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{
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if (addr & (sizeof(long)-1))
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break;
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ret = put_user(*(long *)childreg, datap);
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}
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break;
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case PTRACE_POKEUSR: /* Write register in pt_regs. */
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if (addr >= PTREGS_SIZE)
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break;
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childreg = getregs(child, ©regs) + addr;
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#ifdef CONFIG_COMPAT
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if (is_compat_task()) {
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if (addr & (sizeof(compat_long_t)-1))
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break;
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*(compat_long_t *)childreg = data;
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} else
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#endif
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{
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if (addr & (sizeof(long)-1))
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break;
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*(long *)childreg = data;
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}
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putregs(child, ©regs);
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ret = 0;
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break;
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case PTRACE_GETREGS: /* Get all registers from the child. */
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ret = copy_regset_to_user(child, &tile_user_regset_view,
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REGSET_GPR, 0,
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sizeof(struct pt_regs), datap);
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break;
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case PTRACE_SETREGS: /* Set all registers in the child. */
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ret = copy_regset_from_user(child, &tile_user_regset_view,
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REGSET_GPR, 0,
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sizeof(struct pt_regs), datap);
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break;
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case PTRACE_GETFPREGS: /* Get the child FPU state. */
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case PTRACE_SETFPREGS: /* Set the child FPU state. */
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break;
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case PTRACE_SETOPTIONS:
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/* Support TILE-specific ptrace options. */
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BUILD_BUG_ON(PTRACE_O_MASK_TILE & PTRACE_O_MASK);
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tmp = data & PTRACE_O_MASK_TILE;
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data &= ~PTRACE_O_MASK_TILE;
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ret = ptrace_request(child, request, addr, data);
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if (ret == 0) {
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unsigned int flags = child->ptrace;
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flags &= ~(PTRACE_O_MASK_TILE << PT_OPT_FLAG_SHIFT);
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flags |= (tmp << PT_OPT_FLAG_SHIFT);
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child->ptrace = flags;
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}
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break;
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default:
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#ifdef CONFIG_COMPAT
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if (task_thread_info(current)->status & TS_COMPAT) {
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ret = compat_ptrace_request(child, request,
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addr, data);
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break;
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}
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#endif
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ret = ptrace_request(child, request, addr, data);
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break;
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}
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return ret;
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}
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#ifdef CONFIG_COMPAT
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/* Not used; we handle compat issues in arch_ptrace() directly. */
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long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
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compat_ulong_t addr, compat_ulong_t data)
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{
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BUG();
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}
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#endif
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int do_syscall_trace_enter(struct pt_regs *regs)
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{
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if (test_thread_flag(TIF_SYSCALL_TRACE)) {
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if (tracehook_report_syscall_entry(regs))
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regs->regs[TREG_SYSCALL_NR] = -1;
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}
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if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
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trace_sys_enter(regs, regs->regs[TREG_SYSCALL_NR]);
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return regs->regs[TREG_SYSCALL_NR];
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}
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void do_syscall_trace_exit(struct pt_regs *regs)
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{
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if (test_thread_flag(TIF_SYSCALL_TRACE))
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tracehook_report_syscall_exit(regs, 0);
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if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
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trace_sys_exit(regs, regs->regs[0]);
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}
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void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs)
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{
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struct siginfo info;
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memset(&info, 0, sizeof(info));
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info.si_signo = SIGTRAP;
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info.si_code = TRAP_BRKPT;
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info.si_addr = (void __user *) regs->pc;
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/* Send us the fakey SIGTRAP */
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force_sig_info(SIGTRAP, &info, tsk);
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}
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/* Handle synthetic interrupt delivered only by the simulator. */
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void __kprobes do_breakpoint(struct pt_regs* regs, int fault_num)
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{
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send_sigtrap(current, regs);
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}
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