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73e8b05283
Make it possible to transfer i2c message buffers via DMA. Start/Stop/Sending_Slave_Address and some data is still handled using the old state machine, it is sending the bulk of the data that is done via DMA. The first byte of a transmission and the last two bytes of reception are sent/received using PIO. This is needed for the HW to have access to the first byte before DMA transmit and to be able to set the STOP condition for DMA reception. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Rob Herring <robh@kernel.org> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> [wsa: fixed a checkpatch warning] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
41 lines
1.1 KiB
Plaintext
41 lines
1.1 KiB
Plaintext
I2C for R-Car platforms
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Required properties:
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- compatible: Must be one of
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"renesas,i2c-rcar"
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"renesas,i2c-r8a7778"
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"renesas,i2c-r8a7779"
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"renesas,i2c-r8a7790"
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"renesas,i2c-r8a7791"
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"renesas,i2c-r8a7792"
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"renesas,i2c-r8a7793"
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"renesas,i2c-r8a7794"
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"renesas,i2c-r8a7795"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: interrupt specifier.
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Optional properties:
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- clock-frequency: desired I2C bus clock frequency in Hz. The absence of this
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property indicates the default frequency 100 kHz.
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- clocks: clock specifier.
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- dmas: Must contain a list of two references to DMA specifiers, one for
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transmission, and one for reception.
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- dma-names: Must contain a list of two DMA names, "tx" and "rx".
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- i2c-scl-falling-time-ns: see i2c.txt
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- i2c-scl-internal-delay-ns: see i2c.txt
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- i2c-scl-rising-time-ns: see i2c.txt
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Examples :
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7791";
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reg = <0 0xe6508000 0 0x40>;
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interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
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clock-frequency = <400000>;
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};
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