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0edbb9ba1b
We need to get rid of allocations in the cmd parser, because it needs to be called from a signaling context, first move all pinning to execbuf, where we already hold all locks. Allocate jump_whitelist in the execbuffer, and add annotations around intel_engine_cmd_parser(), to ensure we only call the command parser without allocating any memory, or taking any locks we're not supposed to. Because i915_gem_object_get_page() may also allocate memory, add a path to i915_gem_object_get_sg() that prevents memory allocations, and walk the sg list manually. It should be similarly fast. This has the added benefit of being able to catch all memory allocation errors before the point of no return, and return -ENOMEM safely to the execbuf submitter. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Acked-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210323155059.628690-4-maarten.lankhorst@linux.intel.com
169 lines
4.6 KiB
C
169 lines
4.6 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include <linux/kernel.h>
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#include <asm/fpu/api.h>
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#include "i915_memcpy.h"
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#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
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#define CI_BUG_ON(expr) BUG_ON(expr)
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#else
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#define CI_BUG_ON(expr) BUILD_BUG_ON_INVALID(expr)
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#endif
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static DEFINE_STATIC_KEY_FALSE(has_movntdqa);
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static void __memcpy_ntdqa(void *dst, const void *src, unsigned long len)
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{
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kernel_fpu_begin();
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while (len >= 4) {
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asm("movntdqa (%0), %%xmm0\n"
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"movntdqa 16(%0), %%xmm1\n"
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"movntdqa 32(%0), %%xmm2\n"
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"movntdqa 48(%0), %%xmm3\n"
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"movaps %%xmm0, (%1)\n"
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"movaps %%xmm1, 16(%1)\n"
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"movaps %%xmm2, 32(%1)\n"
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"movaps %%xmm3, 48(%1)\n"
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:: "r" (src), "r" (dst) : "memory");
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src += 64;
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dst += 64;
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len -= 4;
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}
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while (len--) {
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asm("movntdqa (%0), %%xmm0\n"
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"movaps %%xmm0, (%1)\n"
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:: "r" (src), "r" (dst) : "memory");
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src += 16;
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dst += 16;
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}
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kernel_fpu_end();
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}
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static void __memcpy_ntdqu(void *dst, const void *src, unsigned long len)
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{
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kernel_fpu_begin();
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while (len >= 4) {
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asm("movntdqa (%0), %%xmm0\n"
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"movntdqa 16(%0), %%xmm1\n"
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"movntdqa 32(%0), %%xmm2\n"
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"movntdqa 48(%0), %%xmm3\n"
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"movups %%xmm0, (%1)\n"
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"movups %%xmm1, 16(%1)\n"
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"movups %%xmm2, 32(%1)\n"
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"movups %%xmm3, 48(%1)\n"
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:: "r" (src), "r" (dst) : "memory");
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src += 64;
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dst += 64;
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len -= 4;
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}
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while (len--) {
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asm("movntdqa (%0), %%xmm0\n"
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"movups %%xmm0, (%1)\n"
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:: "r" (src), "r" (dst) : "memory");
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src += 16;
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dst += 16;
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}
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kernel_fpu_end();
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}
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/**
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* i915_memcpy_from_wc: perform an accelerated *aligned* read from WC
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* @dst: destination pointer
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* @src: source pointer
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* @len: how many bytes to copy
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*
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* i915_memcpy_from_wc copies @len bytes from @src to @dst using
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* non-temporal instructions where available. Note that all arguments
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* (@src, @dst) must be aligned to 16 bytes and @len must be a multiple
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* of 16.
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*
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* To test whether accelerated reads from WC are supported, use
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* i915_memcpy_from_wc(NULL, NULL, 0);
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*
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* Returns true if the copy was successful, false if the preconditions
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* are not met.
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*/
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bool i915_memcpy_from_wc(void *dst, const void *src, unsigned long len)
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{
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if (unlikely(((unsigned long)dst | (unsigned long)src | len) & 15))
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return false;
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if (static_branch_likely(&has_movntdqa)) {
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if (likely(len))
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__memcpy_ntdqa(dst, src, len >> 4);
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return true;
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}
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return false;
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}
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/**
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* i915_unaligned_memcpy_from_wc: perform a mostly accelerated read from WC
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* @dst: destination pointer
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* @src: source pointer
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* @len: how many bytes to copy
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*
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* Like i915_memcpy_from_wc(), the unaligned variant copies @len bytes from
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* @src to @dst using * non-temporal instructions where available, but
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* accepts that its arguments may not be aligned, but are valid for the
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* potential 16-byte read past the end.
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*/
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void i915_unaligned_memcpy_from_wc(void *dst, const void *src, unsigned long len)
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{
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unsigned long addr;
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CI_BUG_ON(!i915_has_memcpy_from_wc());
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addr = (unsigned long)src;
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if (!IS_ALIGNED(addr, 16)) {
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unsigned long x = min(ALIGN(addr, 16) - addr, len);
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memcpy(dst, src, x);
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len -= x;
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dst += x;
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src += x;
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}
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if (likely(len))
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__memcpy_ntdqu(dst, src, DIV_ROUND_UP(len, 16));
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}
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void i915_memcpy_init_early(struct drm_i915_private *dev_priv)
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{
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/*
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* Some hypervisors (e.g. KVM) don't support VEX-prefix instructions
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* emulation. So don't enable movntdqa in hypervisor guest.
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*/
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if (static_cpu_has(X86_FEATURE_XMM4_1) &&
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!boot_cpu_has(X86_FEATURE_HYPERVISOR))
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static_branch_enable(&has_movntdqa);
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}
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