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2e3db06485
Due to the late Silicon limitation found, we are now pre-starting DATA phase's TRBs. If, still, we get XferNotReady(DATA) we will ignore it unless we're getting it for the wrong direction. In that case we must keep the error case handling plus add a ENDTRANSFER command to forcefully end the Data TRB we started previously, then continue to SetStall and so on. Signed-off-by: Felipe Balbi <balbi@ti.com> |
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.. | ||
core.c | ||
core.h | ||
debug.h | ||
debugfs.c | ||
dwc3-exynos.c | ||
dwc3-omap.c | ||
dwc3-pci.c | ||
ep0.c | ||
gadget.c | ||
gadget.h | ||
host.c | ||
io.h | ||
Kconfig | ||
Makefile |