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ec43b08b57
Register a GPIO driver to access the GPIOs provided by the chip. The GPIOs of the SoC should always start at 0 and the other GPIOs could start at a random position. There is just one SoC in a system and when they start at 0 the number is predictable. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: http://patchwork.linux-mips.org/patch/4591 Acked-by: Florian Fainelli <florian@openwrt.org> |
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| .. | ||
| b43_pci_bridge.c | ||
| driver_chipcommon_pmu.c | ||
| driver_chipcommon.c | ||
| driver_extif.c | ||
| driver_gige.c | ||
| driver_gpio.c | ||
| driver_mipscore.c | ||
| driver_pcicore.c | ||
| embedded.c | ||
| Kconfig | ||
| main.c | ||
| Makefile | ||
| pci.c | ||
| pcihost_wrapper.c | ||
| pcmcia.c | ||
| scan.c | ||
| sdio.c | ||
| sprom.c | ||
| ssb_private.h | ||