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Add anatop phandle which is used to access anatop registers to control PHY's power and other USB operations. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
20 lines
605 B
Plaintext
20 lines
605 B
Plaintext
* Freescale MXS USB Phy Device
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Required properties:
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- compatible: should contain:
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* "fsl,imx23-usbphy" for imx23 and imx28
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* "fsl,imx6q-usbphy" for imx6dq and imx6dl
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* "fsl,imx6sl-usbphy" for imx6sl
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"fsl,imx23-usbphy" is still a fallback for other strings
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- reg: Should contain registers location and length
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- interrupts: Should contain phy interrupt
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- fsl,anatop: phandle for anatop register, it is only for imx6 SoC series
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Example:
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usbphy1: usbphy@020c9000 {
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compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
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reg = <0x020c9000 0x1000>;
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interrupts = <0 44 0x04>;
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fsl,anatop = <&anatop>;
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};
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