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2d3b1b8f0d
The incremental build of Linux kernel is pretty slow when lots of
objects are compiled. The rebuild of allmodconfig may take a few
minutes even when none of the objects needs to be rebuilt.
The time-consuming part in the incremental build is the evaluation of
if_changed* macros since they are used in the recipes to compile C and
assembly source files into objects.
I notice the following code in if_changed* is expensive:
$(filter-out $(PHONY) $(wildcard $^),$^)
In the incremental build, every object has its .*.cmd file, which
contains the auto-generated list of included headers. So, $^ are
expanded into the long list of the source file + included headers,
and $(wildcard $^) checks whether they exist.
It may not be clear why this check exists there.
Here is the record of my research.
[1] The first code addition into Kbuild
This code dates back to 2002. It is the pre-git era. So, I copy-pasted
it from the historical git tree.
| commit 4a6db0791528c220655b063cf13fefc8470dbfee (HEAD)
| Author: Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
| Date: Mon Jun 17 00:22:37 2002 -0500
|
| kbuild: Handle removed headers
|
| New and old way to handle dependencies would choke when a file
| #include'd by other files was removed, since the dependency on it was
| still recorded, but since it was gone, make has no idea what to do about
| it (and would complain with "No rule to make <file> ...")
|
| We now add targets for all the previously included files, so make will
| just ignore them if they disappear.
|
| diff --git a/Rules.make b/Rules.make
| index 6ef827d3df39..7db5301ea7db 100644
| --- a/Rules.make
| +++ b/Rules.make
| @@ -446,7 +446,7 @@ if_changed = $(if $(strip $? \
| # execute the command and also postprocess generated .d dependencies
| # file
|
| -if_changed_dep = $(if $(strip $? \
| +if_changed_dep = $(if $(strip $? $(filter-out FORCE $(wildcard $^),$^)\
| $(filter-out $(cmd_$(1)),$(cmd_$@))\
| $(filter-out $(cmd_$@),$(cmd_$(1)))),\
| @set -e; \
| diff --git a/scripts/fixdep.c b/scripts/fixdep.c
| index b5d7bee8efc7..db45bd1888c0 100644
| --- a/scripts/fixdep.c
| +++ b/scripts/fixdep.c
| @@ -292,7 +292,7 @@ void parse_dep_file(void *map, size_t len)
| exit(1);
| }
| memcpy(s, m, p-m); s[p-m] = 0;
| - printf("%s: \\\n", target);
| + printf("deps_%s := \\\n", target);
| m = p+1;
|
| clear_config();
| @@ -314,7 +314,8 @@ void parse_dep_file(void *map, size_t len)
| }
| m = p + 1;
| }
| - printf("\n");
| + printf("\n%s: $(deps_%s)\n\n", target, target);
| + printf("$(deps_%s):\n", target);
| }
|
| void print_deps(void)
The "No rule to make <file> ..." error can be solved by passing -MP to
the compiler, but I think the detection of header removal is a good
feature. When a header is removed, all source files that previously
included it should be re-compiled. This makes sure we has correctly
got rid of #include directives of it.
This is also related with the behavior of $?. The GNU Make manual says:
$?
The names of all the prerequisites that are newer than the target,
with spaces between them.
This does not explain whether a non-existent prerequisite is considered
to be newer than the target.
At this point of time, GNU Make 3.7x was used, where the $? did not
include non-existent prerequisites. Therefore,
$(filter-out FORCE $(wildcard $^),$^)
was useful to detect the header removal, and to rebuild the related
objects if it is the case.
[2] Change of $? behavior
Later, the behavior of $? was changed (fixed) to include prerequisites
that did not exist.
First, GNU Make commit 64e16d6c00a5 ("Various changes getting ready for
the release of 3.81.") changed it, but in the release test of 3.81, it
turned out to break the kernel build.
See these:
- http://lists.gnu.org/archive/html/bug-make/2006-03/msg00003.html
- https://savannah.gnu.org/bugs/?16002
- https://savannah.gnu.org/bugs/?16051
Then, GNU Make commit 6d8d9b74d9c5 ("Numerous updates to tests for
issues found on Cygwin and Windows.") reverted it for the 3.81 release
to give Linux kernel time to adjust to the new behavior.
After the 3.81 release, GNU Make commit 7595f38f62af ("Fixed a number
of documentation bugs, plus some build/install issues:") re-added it.
[3] Adjustment to the new $? behavior on Kbuild side
Meanwhile, the kernel build was changed by commit 4f1933620f ("kbuild:
change kbuild to not rely on incorrect GNU make behavior") to adjust to
the new $? behavior.
[4] GNU Make 3.82 released in 2010
GNU Make 3.82 was the first release that integrated the correct $?
behavior. At this point, Kbuild dealt with GNU Make versions with
different $? behaviors.
3.81 or older:
$? does not contain any non-existent prerequisite.
$(filter-out $(PHONY) $(wildcard $^),$^) was useful to detect
removed include headers.
3.82 or newer:
$? contains non-existent prerequisites. When a header is removed,
it appears in $?. $(filter-out $(PHONY) $(wildcard $^),$^) became
a redundant check.
With the correct $? behavior, we could have dropped the expensive
check for 3.82 or later, but we did not. (Maybe nobody noticed this
optimization.)
[5] The .SECONDARY special target trips up $?
Some time later, I noticed $? did not work as expected under some
circumstances. As above, $? should contain non-existent prerequisites,
but the ones specified as SECONDARY do not appear in $?.
I asked this in GNU Make ML, and it seems a bug:
https://lists.gnu.org/archive/html/bug-make/2019-01/msg00001.html
Since commit 8e9b61b293 ("kbuild: move .SECONDARY special target to
Kbuild.include"), all files, including headers listed in .*.cmd files,
are treated as secondary.
So, we are back into the incorrect $? behavior.
If we Kbuild want to react to the header removal, we need to keep
$(filter-out $(PHONY) $(wildcard $^),$^) but this makes the rebuild
so slow.
[Summary]
- I believe noticing the header removal and recompiling related objects
is a nice feature for the build system.
- If $? worked correctly, $(filter-out $(PHONY),$?) would be enough
to detect the header removal.
- Currently, $? does not work correctly when used with .SECONDARY,
and Kbuild is hit by this bug.
- I filed a bug report for this, but not fixed yet as of writing.
- Currently, the header removal is detected by the following expensive
code:
$(filter-out $(PHONY) $(wildcard $^),$^)
- I do not want to revert commit 8e9b61b293 ("kbuild: move
.SECONDARY special target to Kbuild.include"). Specifying
.SECONDARY globally is clean, and it matches to the Kbuild policy.
This commit proactively removes the expensive check since it makes the
incremental build faster. A downside is Kbuild will no longer be able
to notice the header removal.
You can confirm it by the full-build followed by a header removal, and
then re-build.
$ make defconfig all
[ full build ]
$ rm include/linux/device.h
$ make
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#11)
Building modules, stage 2.
MODPOST 12 modules
Previously, Kbuild noticed a missing header and emits a build error.
Now, Kbuild is fine with it. This is an unusual corner-case, not a big
deal. Once the $? bug is fixed in GNU Make, everything will work fine.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
332 lines
12 KiB
Plaintext
332 lines
12 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
|
|
####
|
|
# kbuild: Generic definitions
|
|
|
|
# Convenient variables
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comma := ,
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quote := "
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squote := '
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empty :=
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space := $(empty) $(empty)
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space_escape := _-_SPACE_-_
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pound := \#
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|
|
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###
|
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# Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o
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dot-target = $(dir $@).$(notdir $@)
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|
|
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###
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# The temporary file to save gcc -MD generated dependencies must not
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# contain a comma
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depfile = $(subst $(comma),_,$(dot-target).d)
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|
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###
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# filename of target with directory and extension stripped
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basetarget = $(basename $(notdir $@))
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|
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###
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# real prerequisites without phony targets
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real-prereqs = $(filter-out $(PHONY), $^)
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|
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###
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# Escape single quote for use in echo statements
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escsq = $(subst $(squote),'\$(squote)',$1)
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|
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###
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# Easy method for doing a status message
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kecho := :
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quiet_kecho := echo
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silent_kecho := :
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kecho := $($(quiet)kecho)
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|
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###
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# filechk is used to check if the content of a generated file is updated.
|
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# Sample usage:
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#
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# filechk_sample = echo $(KERNELRELEASE)
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# version.h: FORCE
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# $(call filechk,sample)
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#
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# The rule defined shall write to stdout the content of the new file.
|
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# The existing file will be compared with the new one.
|
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# - If no file exist it is created
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# - If the content differ the new file is used
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# - If they are equal no change, and no timestamp update
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# - stdin is piped in from the first prerequisite ($<) so one has
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# to specify a valid file as first prerequisite (often the kbuild file)
|
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define filechk
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$(Q)set -e; \
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mkdir -p $(dir $@); \
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{ $(filechk_$(1)); } > $@.tmp; \
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if [ -r $@ ] && cmp -s $@ $@.tmp; then \
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rm -f $@.tmp; \
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else \
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$(kecho) ' UPD $@'; \
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mv -f $@.tmp $@; \
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fi
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endef
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######
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# gcc support functions
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# See documentation in Documentation/kbuild/makefiles.rst
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|
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# cc-cross-prefix
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# Usage: CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu- m68k-linux-)
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# Return first <prefix> where a <prefix>gcc is found in PATH.
|
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# If no gcc found in PATH with listed prefixes return nothing
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#
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# Note: '2>/dev/null' is here to force Make to invoke a shell. Otherwise, it
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# would try to directly execute the shell builtin 'command'. This workaround
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# should be kept for a long time since this issue was fixed only after the
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# GNU Make 4.2.1 release.
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cc-cross-prefix = $(firstword $(foreach c, $(1), \
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$(if $(shell command -v -- $(c)gcc 2>/dev/null), $(c))))
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# output directory for tests below
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TMPOUT := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/)
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|
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# try-run
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# Usage: option = $(call try-run, $(CC)...-o "$$TMP",option-ok,otherwise)
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# Exit code chooses option. "$$TMP" serves as a temporary file and is
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# automatically cleaned up.
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try-run = $(shell set -e; \
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TMP="$(TMPOUT).$$$$.tmp"; \
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TMPO="$(TMPOUT).$$$$.o"; \
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if ($(1)) >/dev/null 2>&1; \
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then echo "$(2)"; \
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else echo "$(3)"; \
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fi; \
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rm -f "$$TMP" "$$TMPO")
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# as-option
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# Usage: cflags-y += $(call as-option,-Wa$(comma)-isa=foo,)
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as-option = $(call try-run,\
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$(CC) $(KBUILD_CFLAGS) $(1) -c -x assembler /dev/null -o "$$TMP",$(1),$(2))
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|
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# as-instr
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# Usage: cflags-y += $(call as-instr,instr,option1,option2)
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as-instr = $(call try-run,\
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printf "%b\n" "$(1)" | $(CC) $(KBUILD_AFLAGS) -c -x assembler -o "$$TMP" -,$(2),$(3))
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# __cc-option
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# Usage: MY_CFLAGS += $(call __cc-option,$(CC),$(MY_CFLAGS),-march=winchip-c6,-march=i586)
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__cc-option = $(call try-run,\
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$(1) -Werror $(2) $(3) -c -x c /dev/null -o "$$TMP",$(3),$(4))
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# Do not attempt to build with gcc plugins during cc-option tests.
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# (And this uses delayed resolution so the flags will be up to date.)
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CC_OPTION_CFLAGS = $(filter-out $(GCC_PLUGINS_CFLAGS),$(KBUILD_CFLAGS))
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# cc-option
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# Usage: cflags-y += $(call cc-option,-march=winchip-c6,-march=i586)
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cc-option = $(call __cc-option, $(CC),\
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$(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS),$(1),$(2))
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# cc-option-yn
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# Usage: flag := $(call cc-option-yn,-march=winchip-c6)
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cc-option-yn = $(call try-run,\
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$(CC) -Werror $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n)
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# cc-disable-warning
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# Usage: cflags-y += $(call cc-disable-warning,unused-but-set-variable)
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cc-disable-warning = $(call try-run,\
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$(CC) -Werror $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1)))
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# cc-ifversion
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# Usage: EXTRA_CFLAGS += $(call cc-ifversion, -lt, 0402, -O1)
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cc-ifversion = $(shell [ $(CONFIG_GCC_VERSION)0 $(1) $(2)000 ] && echo $(3) || echo $(4))
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# ld-option
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# Usage: KBUILD_LDFLAGS += $(call ld-option, -X, -Y)
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ld-option = $(call try-run, $(LD) $(KBUILD_LDFLAGS) $(1) -v,$(1),$(2),$(3))
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# ld-version
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# Note this is mainly for HJ Lu's 3 number binutil versions
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ld-version = $(shell $(LD) --version | $(srctree)/scripts/ld-version.sh)
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# ld-ifversion
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# Usage: $(call ld-ifversion, -ge, 22252, y)
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ld-ifversion = $(shell [ $(ld-version) $(1) $(2) ] && echo $(3) || echo $(4))
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######
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
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# Usage:
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# $(Q)$(MAKE) $(build)=dir
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build := -f $(srctree)/scripts/Makefile.build obj
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj=
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# Usage:
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# $(Q)$(MAKE) $(modbuiltin)=dir
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modbuiltin := -f $(srctree)/scripts/Makefile.modbuiltin obj
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.dtbinst obj=
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# Usage:
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# $(Q)$(MAKE) $(dtbinst)=dir
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dtbinst := -f $(srctree)/scripts/Makefile.dtbinst obj
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.clean obj=
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# Usage:
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# $(Q)$(MAKE) $(clean)=dir
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clean := -f $(srctree)/scripts/Makefile.clean obj
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# echo command.
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# Short version is used, if $(quiet) equals `quiet_', otherwise full one.
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echo-cmd = $(if $($(quiet)cmd_$(1)),\
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echo ' $(call escsq,$($(quiet)cmd_$(1)))$(echo-why)';)
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# printing commands
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cmd = @set -e; $(echo-cmd) $(cmd_$(1))
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###
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# if_changed - execute command if any prerequisite is newer than
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# target, or command line has changed
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# if_changed_dep - as if_changed, but uses fixdep to reveal dependencies
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# including used config symbols
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# if_changed_rule - as if_changed but execute rule instead
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# See Documentation/kbuild/makefiles.rst for more info
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ifneq ($(KBUILD_NOCMDDEP),1)
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# Check if both commands are the same including their order. Result is empty
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# string if equal. User may override this check using make KBUILD_NOCMDDEP=1
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cmd-check = $(filter-out $(subst $(space),$(space_escape),$(strip $(cmd_$@))), \
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$(subst $(space),$(space_escape),$(strip $(cmd_$1))))
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else
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cmd-check = $(if $(strip $(cmd_$@)),,1)
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endif
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# Replace >$< with >$$< to preserve $ when reloading the .cmd file
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# (needed for make)
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# Replace >#< with >$(pound)< to avoid starting a comment in the .cmd file
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# (needed for make)
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# Replace >'< with >'\''< to be able to enclose the whole string in '...'
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# (needed for the shell)
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make-cmd = $(call escsq,$(subst $(pound),$$(pound),$(subst $$,$$$$,$(cmd_$(1)))))
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# Find any prerequisites that are newer than target or that do not exist.
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# (This is not true for now; $? should contain any non-existent prerequisites,
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# but it does not work as expected when .SECONDARY is present. This seems a bug
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# of GNU Make.)
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# PHONY targets skipped in both cases.
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any-prereq = $(filter-out $(PHONY),$?)
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# Execute command if command has changed or prerequisite(s) are updated.
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if_changed = $(if $(any-prereq)$(cmd-check), \
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$(cmd); \
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printf '%s\n' 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd, @:)
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# Execute the command and also postprocess generated .d dependencies file.
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if_changed_dep = $(if $(any-prereq)$(cmd-check),$(cmd_and_fixdep),@:)
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cmd_and_fixdep = \
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$(cmd); \
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scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).cmd;\
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rm -f $(depfile)
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# Usage: $(call if_changed_rule,foo)
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# Will check if $(cmd_foo) or any of the prerequisites changed,
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# and if so will execute $(rule_foo).
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if_changed_rule = $(if $(any-prereq)$(cmd-check),$(rule_$(1)),@:)
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###
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# why - tell why a target got built
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# enabled by make V=2
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# Output (listed in the order they are checked):
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# (1) - due to target is PHONY
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# (2) - due to target missing
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# (3) - due to: file1.h file2.h
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# (4) - due to command line change
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# (5) - due to missing .cmd file
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# (6) - due to target not in $(targets)
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# (1) PHONY targets are always build
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# (2) No target, so we better build it
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# (3) Prerequisite is newer than target
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# (4) The command line stored in the file named dir/.target.cmd
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# differed from actual command line. This happens when compiler
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# options changes
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# (5) No dir/.target.cmd file (used to store command line)
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# (6) No dir/.target.cmd file and target not listed in $(targets)
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# This is a good hint that there is a bug in the kbuild file
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ifeq ($(KBUILD_VERBOSE),2)
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why = \
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$(if $(filter $@, $(PHONY)),- due to target is PHONY, \
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$(if $(wildcard $@), \
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$(if $(any-prereq),- due to: $(any-prereq), \
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$(if $(cmd-check), \
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$(if $(cmd_$@),- due to command line change, \
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$(if $(filter $@, $(targets)), \
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- due to missing .cmd file, \
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- due to $(notdir $@) not in $$(targets) \
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) \
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) \
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) \
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), \
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- due to target missing \
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) \
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)
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echo-why = $(call escsq, $(strip $(why)))
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endif
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###############################################################################
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#
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# When a Kconfig string contains a filename, it is suitable for
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# passing to shell commands. It is surrounded by double-quotes, and
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# any double-quotes or backslashes within it are escaped by
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# backslashes.
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#
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# This is no use for dependencies or $(wildcard). We need to strip the
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# surrounding quotes and the escaping from quotes and backslashes, and
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# we *do* need to escape any spaces in the string. So, for example:
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#
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# Usage: $(eval $(call config_filename,FOO))
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#
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# Defines FOO_FILENAME based on the contents of the CONFIG_FOO option,
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# transformed as described above to be suitable for use within the
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# makefile.
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#
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# Also, if the filename is a relative filename and exists in the source
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# tree but not the build tree, define FOO_SRCPREFIX as $(srctree)/ to
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# be prefixed to *both* command invocation and dependencies.
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#
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# Note: We also print the filenames in the quiet_cmd_foo text, and
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# perhaps ought to have a version specially escaped for that purpose.
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# But it's only cosmetic, and $(patsubst "%",%,$(CONFIG_FOO)) is good
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# enough. It'll strip the quotes in the common case where there's no
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# space and it's a simple filename, and it'll retain the quotes when
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# there's a space. There are some esoteric cases in which it'll print
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# the wrong thing, but we don't really care. The actual dependencies
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# and commands *do* get it right, with various combinations of single
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# and double quotes, backslashes and spaces in the filenames.
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#
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###############################################################################
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#
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define config_filename
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ifneq ($$(CONFIG_$(1)),"")
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$(1)_FILENAME := $$(subst \\,\,$$(subst \$$(quote),$$(quote),$$(subst $$(space_escape),\$$(space),$$(patsubst "%",%,$$(subst $$(space),$$(space_escape),$$(CONFIG_$(1)))))))
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|
ifneq ($$(patsubst /%,%,$$(firstword $$($(1)_FILENAME))),$$(firstword $$($(1)_FILENAME)))
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|
else
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|
ifeq ($$(wildcard $$($(1)_FILENAME)),)
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|
ifneq ($$(wildcard $$(srctree)/$$($(1)_FILENAME)),)
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|
$(1)_SRCPREFIX := $(srctree)/
|
|
endif
|
|
endif
|
|
endif
|
|
endif
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|
endef
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|
#
|
|
###############################################################################
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|
|
|
# delete partially updated (i.e. corrupted) files on error
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|
.DELETE_ON_ERROR:
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|
|
|
# do not delete intermediate files automatically
|
|
.SECONDARY:
|