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For boards without a reset GPIO we skip the delay between enabling the pcie_ref_clk and touching the RC registers for configuration. This hangs the system if there isn't a proper delay to ensure the clocks are settled in the DW PCIe core. Also iMX6Q always needs an additional 10us delay to make sure the reset is propagated through the core, as we don't have an explicitly controlled reset input on this SoC. This fixes a problem with |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| pci-dra7xx.c | ||
| pci-exynos.c | ||
| pci-host-generic.c | ||
| pci-imx6.c | ||
| pci-keystone-dw.c | ||
| pci-keystone.c | ||
| pci-keystone.h | ||
| pci-mvebu.c | ||
| pci-rcar-gen2.c | ||
| pci-tegra.c | ||
| pci-xgene.c | ||
| pcie-designware.c | ||
| pcie-designware.h | ||
| pcie-rcar.c | ||
| pcie-spear13xx.c | ||
| pcie-xilinx.c | ||