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049d34e94f
Exynos drm hdmi driver used to get dummy hdmiphy clock to control the PMU bit for hdmiphy. This bit needs to be set before setting any resolution to hdmi hardware. This was handled using dummy hdmiphy clock which is removed here. PMU is already defined as system controller for exynos SoCs. Hdmi driver is modified to control the phy enable bit inside PMU using regmap interfaces. Devicetree binding document for hdmi is also updated. Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
44 lines
1.6 KiB
Plaintext
44 lines
1.6 KiB
Plaintext
Device-Tree bindings for drm hdmi driver
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Required properties:
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- compatible: value should be one among the following:
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1) "samsung,exynos5-hdmi" <DEPRECATED>
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2) "samsung,exynos4210-hdmi"
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3) "samsung,exynos4212-hdmi"
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4) "samsung,exynos5420-hdmi"
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- reg: physical base address of the hdmi and length of memory mapped
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region.
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- interrupts: interrupt number to the cpu.
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- hpd-gpio: following information about the hotplug gpio pin.
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a) phandle of the gpio controller node.
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b) pin number within the gpio controller.
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c) optional flags and pull up/down.
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- clocks: list of clock IDs from SoC clock driver.
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a) hdmi: Gate of HDMI IP bus clock.
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b) sclk_hdmi: Gate of HDMI special clock.
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c) sclk_pixel: Pixel special clock, one of the two possible inputs of
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HDMI clock mux.
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d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of
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HDMI clock mux.
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e) mout_hdmi: It is required by the driver to switch between the 2
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parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
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after configuration, parent is set to sclk_hdmiphy else
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sclk_pixel.
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- clock-names: aliases as per driver requirements for above clock IDs:
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"hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".
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- ddc: phandle to the hdmi ddc node
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- phy: phandle to the hdmi phy node
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- samsung,syscon-phandle: phandle for system controller node for PMU.
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Example:
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hdmi {
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compatible = "samsung,exynos4212-hdmi";
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reg = <0x14530000 0x100000>;
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interrupts = <0 95 0>;
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hpd-gpio = <&gpx3 7 1>;
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ddc = <&hdmi_ddc_node>;
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phy = <&hdmi_phy_node>;
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samsung,syscon-phandle = <&pmu_system_controller>;
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};
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