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0e4ccb1505
Certain platforms do not allow writes in the MSI-X BARs to setup or tear down vector values. To combat against the generic code trying to write to that and either silently being ignored or crashing due to the pagetables being marked R/O this patch introduces a platform override. Note that we keep two separate, non-weak, functions default_mask_msi_irqs() and default_mask_msix_irqs() for the behavior of the arch_mask_msi_irqs() and arch_mask_msix_irqs(), as the default behavior is needed by x86 PCI code. For Xen, which does not allow the guest to write to MSI-X tables - as the hypervisor is solely responsible for setting the vector values - we implement two nops. This fixes a Xen guest crash when passing a PCI device with MSI-X to the guest. See the bugzilla for more details. [bhelgaas: add bugzilla info] Reference: https://bugzilla.kernel.org/show_bug.cgi?id=64581 Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Sucheta Chakraborty <sucheta.chakraborty@qlogic.com> CC: Zhenzhong Duan <zhenzhong.duan@oracle.com>
593 lines
14 KiB
C
593 lines
14 KiB
C
/*
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* Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
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* initial domain support. We also handle the DSDT _PRT callbacks for GSI's
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* used in HVM and initial domain mode (PV does not parse ACPI, so it has no
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* concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
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* 0xcf8 PCI configuration read/write.
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*
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* Author: Ryan Wilson <hap9@epoch.ncsc.mil>
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* Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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* Stefano Stabellini <stefano.stabellini@eu.citrix.com>
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <linux/io.h>
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#include <asm/io_apic.h>
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#include <asm/pci_x86.h>
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#include <asm/xen/hypervisor.h>
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#include <xen/features.h>
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#include <xen/events.h>
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#include <asm/xen/pci.h>
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static int xen_pcifront_enable_irq(struct pci_dev *dev)
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{
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int rc;
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int share = 1;
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int pirq;
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u8 gsi;
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rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
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if (rc < 0) {
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dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
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rc);
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return rc;
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}
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/* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
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pirq = gsi;
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if (gsi < NR_IRQS_LEGACY)
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share = 0;
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rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
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if (rc < 0) {
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dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
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gsi, pirq, rc);
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return rc;
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}
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dev->irq = rc;
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dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
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return 0;
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}
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#ifdef CONFIG_ACPI
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static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
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bool set_pirq)
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{
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int rc, pirq = -1, irq = -1;
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struct physdev_map_pirq map_irq;
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int shareable = 0;
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char *name;
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irq = xen_irq_from_gsi(gsi);
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if (irq > 0)
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return irq;
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if (set_pirq)
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pirq = gsi;
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map_irq.domid = DOMID_SELF;
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map_irq.type = MAP_PIRQ_TYPE_GSI;
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map_irq.index = gsi;
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map_irq.pirq = pirq;
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rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
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if (rc) {
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printk(KERN_WARNING "xen map irq failed %d\n", rc);
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return -1;
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}
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if (triggering == ACPI_EDGE_SENSITIVE) {
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shareable = 0;
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name = "ioapic-edge";
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} else {
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shareable = 1;
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name = "ioapic-level";
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}
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if (gsi_override >= 0)
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gsi = gsi_override;
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irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
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if (irq < 0)
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goto out;
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printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
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out:
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return irq;
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}
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static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
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int trigger, int polarity)
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{
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if (!xen_hvm_domain())
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return -1;
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return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
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false /* no mapping of GSI to PIRQ */);
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}
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#ifdef CONFIG_XEN_DOM0
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static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
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{
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int rc, irq;
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struct physdev_setup_gsi setup_gsi;
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if (!xen_pv_domain())
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return -1;
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printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
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gsi, triggering, polarity);
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irq = xen_register_pirq(gsi, gsi_override, triggering, true);
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setup_gsi.gsi = gsi;
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setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
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setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
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rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
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if (rc == -EEXIST)
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printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
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else if (rc) {
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printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
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gsi, rc);
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}
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return irq;
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}
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static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
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int trigger, int polarity)
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{
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return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
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}
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#endif
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#endif
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#if defined(CONFIG_PCI_MSI)
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#include <linux/msi.h>
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#include <asm/msidef.h>
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struct xen_pci_frontend_ops *xen_pci_frontend;
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EXPORT_SYMBOL_GPL(xen_pci_frontend);
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static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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{
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int irq, ret, i;
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struct msi_desc *msidesc;
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int *v;
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if (type == PCI_CAP_ID_MSI && nvec > 1)
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return 1;
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v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
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if (!v)
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return -ENOMEM;
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if (type == PCI_CAP_ID_MSIX)
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ret = xen_pci_frontend_enable_msix(dev, v, nvec);
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else
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ret = xen_pci_frontend_enable_msi(dev, v);
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if (ret)
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goto error;
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i = 0;
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list_for_each_entry(msidesc, &dev->msi_list, list) {
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irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
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(type == PCI_CAP_ID_MSIX) ?
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"pcifront-msi-x" :
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"pcifront-msi",
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DOMID_SELF);
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if (irq < 0) {
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ret = irq;
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goto free;
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}
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i++;
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}
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kfree(v);
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return 0;
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error:
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dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
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free:
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kfree(v);
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return ret;
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}
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#define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
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MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
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static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
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struct msi_msg *msg)
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{
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/* We set vector == 0 to tell the hypervisor we don't care about it,
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* but we want a pirq setup instead.
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* We use the dest_id field to pass the pirq that we want. */
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msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
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msg->address_lo =
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MSI_ADDR_BASE_LO |
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MSI_ADDR_DEST_MODE_PHYSICAL |
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MSI_ADDR_REDIRECTION_CPU |
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MSI_ADDR_DEST_ID(pirq);
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msg->data = XEN_PIRQ_MSI_DATA;
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}
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static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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{
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int irq, pirq;
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struct msi_desc *msidesc;
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struct msi_msg msg;
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if (type == PCI_CAP_ID_MSI && nvec > 1)
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return 1;
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list_for_each_entry(msidesc, &dev->msi_list, list) {
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__read_msi_msg(msidesc, &msg);
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pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) |
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((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
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if (msg.data != XEN_PIRQ_MSI_DATA ||
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xen_irq_from_pirq(pirq) < 0) {
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pirq = xen_allocate_pirq_msi(dev, msidesc);
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if (pirq < 0) {
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irq = -ENODEV;
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goto error;
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}
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xen_msi_compose_msg(dev, pirq, &msg);
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__write_msi_msg(msidesc, &msg);
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dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
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} else {
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dev_dbg(&dev->dev,
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"xen: msi already bound to pirq=%d\n", pirq);
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}
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irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
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(type == PCI_CAP_ID_MSIX) ?
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"msi-x" : "msi",
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DOMID_SELF);
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if (irq < 0)
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goto error;
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dev_dbg(&dev->dev,
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"xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
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}
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return 0;
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error:
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dev_err(&dev->dev,
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"Xen PCI frontend has not registered MSI/MSI-X support!\n");
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return irq;
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}
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#ifdef CONFIG_XEN_DOM0
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static bool __read_mostly pci_seg_supported = true;
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static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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{
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int ret = 0;
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struct msi_desc *msidesc;
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if (type == PCI_CAP_ID_MSI && nvec > 1)
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return 1;
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list_for_each_entry(msidesc, &dev->msi_list, list) {
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struct physdev_map_pirq map_irq;
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domid_t domid;
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domid = ret = xen_find_device_domain_owner(dev);
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/* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
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* hence check ret value for < 0. */
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if (ret < 0)
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domid = DOMID_SELF;
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memset(&map_irq, 0, sizeof(map_irq));
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map_irq.domid = domid;
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map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
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map_irq.index = -1;
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map_irq.pirq = -1;
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map_irq.bus = dev->bus->number |
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(pci_domain_nr(dev->bus) << 16);
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map_irq.devfn = dev->devfn;
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if (type == PCI_CAP_ID_MSIX) {
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int pos;
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u32 table_offset, bir;
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pos = dev->msix_cap;
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pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
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&table_offset);
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bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
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map_irq.table_base = pci_resource_start(dev, bir);
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map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
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}
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ret = -EINVAL;
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if (pci_seg_supported)
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ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
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&map_irq);
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if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
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map_irq.type = MAP_PIRQ_TYPE_MSI;
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map_irq.index = -1;
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map_irq.pirq = -1;
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map_irq.bus = dev->bus->number;
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ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
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&map_irq);
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if (ret != -EINVAL)
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pci_seg_supported = false;
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}
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if (ret) {
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dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
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ret, domid);
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goto out;
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}
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ret = xen_bind_pirq_msi_to_irq(dev, msidesc,
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map_irq.pirq,
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(type == PCI_CAP_ID_MSIX) ?
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"msi-x" : "msi",
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domid);
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if (ret < 0)
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goto out;
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}
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ret = 0;
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out:
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return ret;
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}
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static void xen_initdom_restore_msi_irqs(struct pci_dev *dev, int irq)
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{
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int ret = 0;
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if (pci_seg_supported) {
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struct physdev_pci_device restore_ext;
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restore_ext.seg = pci_domain_nr(dev->bus);
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restore_ext.bus = dev->bus->number;
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restore_ext.devfn = dev->devfn;
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ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
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&restore_ext);
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if (ret == -ENOSYS)
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pci_seg_supported = false;
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WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
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}
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if (!pci_seg_supported) {
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struct physdev_restore_msi restore;
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restore.bus = dev->bus->number;
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restore.devfn = dev->devfn;
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ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
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WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
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}
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}
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#endif
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static void xen_teardown_msi_irqs(struct pci_dev *dev)
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{
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struct msi_desc *msidesc;
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msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
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if (msidesc->msi_attrib.is_msix)
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xen_pci_frontend_disable_msix(dev);
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else
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xen_pci_frontend_disable_msi(dev);
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/* Free the IRQ's and the msidesc using the generic code. */
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default_teardown_msi_irqs(dev);
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}
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static void xen_teardown_msi_irq(unsigned int irq)
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{
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xen_destroy_irq(irq);
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}
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static u32 xen_nop_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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return 0;
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}
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static u32 xen_nop_msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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return 0;
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}
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#endif
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int __init pci_xen_init(void)
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{
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if (!xen_pv_domain() || xen_initial_domain())
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return -ENODEV;
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printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
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pcibios_set_cache_line_size();
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pcibios_enable_irq = xen_pcifront_enable_irq;
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pcibios_disable_irq = NULL;
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#ifdef CONFIG_ACPI
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/* Keep ACPI out of the picture */
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acpi_noirq = 1;
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#endif
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#ifdef CONFIG_PCI_MSI
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x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
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x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
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x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
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x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
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x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
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#endif
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return 0;
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}
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int __init pci_xen_hvm_init(void)
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{
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if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
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return 0;
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#ifdef CONFIG_ACPI
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/*
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* We don't want to change the actual ACPI delivery model,
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* just how GSIs get registered.
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*/
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__acpi_register_gsi = acpi_register_gsi_xen_hvm;
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#endif
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#ifdef CONFIG_PCI_MSI
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x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
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x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
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#endif
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return 0;
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}
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#ifdef CONFIG_XEN_DOM0
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static __init void xen_setup_acpi_sci(void)
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{
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int rc;
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int trigger, polarity;
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int gsi = acpi_sci_override_gsi;
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int irq = -1;
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int gsi_override = -1;
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if (!gsi)
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return;
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rc = acpi_get_override_irq(gsi, &trigger, &polarity);
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if (rc) {
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printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
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" sci, rc=%d\n", rc);
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return;
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}
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trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
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polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
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printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
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"polarity=%d\n", gsi, trigger, polarity);
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|
/* Before we bind the GSI to a Linux IRQ, check whether
|
|
* we need to override it with bus_irq (IRQ) value. Usually for
|
|
* IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
|
|
* ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
|
|
* but there are oddballs where the IRQ != GSI:
|
|
* ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
|
|
* which ends up being: gsi_to_irq[9] == 20
|
|
* (which is what acpi_gsi_to_irq ends up calling when starting the
|
|
* the ACPI interpreter and keels over since IRQ 9 has not been
|
|
* setup as we had setup IRQ 20 for it).
|
|
*/
|
|
if (acpi_gsi_to_irq(gsi, &irq) == 0) {
|
|
/* Use the provided value if it's valid. */
|
|
if (irq >= 0)
|
|
gsi_override = irq;
|
|
}
|
|
|
|
gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
|
|
printk(KERN_INFO "xen: acpi sci %d\n", gsi);
|
|
|
|
return;
|
|
}
|
|
|
|
int __init pci_xen_initial_domain(void)
|
|
{
|
|
int irq;
|
|
|
|
#ifdef CONFIG_PCI_MSI
|
|
x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
|
|
x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
|
|
x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
|
|
x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
|
|
x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
|
|
#endif
|
|
xen_setup_acpi_sci();
|
|
__acpi_register_gsi = acpi_register_gsi_xen;
|
|
/* Pre-allocate legacy irqs */
|
|
for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
|
|
int trigger, polarity;
|
|
|
|
if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
|
|
continue;
|
|
|
|
xen_register_pirq(irq, -1 /* no GSI override */,
|
|
trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
|
|
true /* Map GSI to PIRQ */);
|
|
}
|
|
if (0 == nr_ioapics) {
|
|
for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
|
|
xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
struct xen_device_domain_owner {
|
|
domid_t domain;
|
|
struct pci_dev *dev;
|
|
struct list_head list;
|
|
};
|
|
|
|
static DEFINE_SPINLOCK(dev_domain_list_spinlock);
|
|
static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
|
|
|
|
static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
|
|
{
|
|
struct xen_device_domain_owner *owner;
|
|
|
|
list_for_each_entry(owner, &dev_domain_list, list) {
|
|
if (owner->dev == dev)
|
|
return owner;
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
int xen_find_device_domain_owner(struct pci_dev *dev)
|
|
{
|
|
struct xen_device_domain_owner *owner;
|
|
int domain = -ENODEV;
|
|
|
|
spin_lock(&dev_domain_list_spinlock);
|
|
owner = find_device(dev);
|
|
if (owner)
|
|
domain = owner->domain;
|
|
spin_unlock(&dev_domain_list_spinlock);
|
|
return domain;
|
|
}
|
|
EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
|
|
|
|
int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
|
|
{
|
|
struct xen_device_domain_owner *owner;
|
|
|
|
owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
|
|
if (!owner)
|
|
return -ENODEV;
|
|
|
|
spin_lock(&dev_domain_list_spinlock);
|
|
if (find_device(dev)) {
|
|
spin_unlock(&dev_domain_list_spinlock);
|
|
kfree(owner);
|
|
return -EEXIST;
|
|
}
|
|
owner->domain = domain;
|
|
owner->dev = dev;
|
|
list_add_tail(&owner->list, &dev_domain_list);
|
|
spin_unlock(&dev_domain_list_spinlock);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
|
|
|
|
int xen_unregister_device_domain_owner(struct pci_dev *dev)
|
|
{
|
|
struct xen_device_domain_owner *owner;
|
|
|
|
spin_lock(&dev_domain_list_spinlock);
|
|
owner = find_device(dev);
|
|
if (!owner) {
|
|
spin_unlock(&dev_domain_list_spinlock);
|
|
return -ENODEV;
|
|
}
|
|
list_del(&owner->list);
|
|
spin_unlock(&dev_domain_list_spinlock);
|
|
kfree(owner);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
|
|
#endif
|