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6e3321631a
Add support to setup the MSM timer via information obtained from the devicetree. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [davidb@codeaurora.org: Remove leading zeros] Signed-off-by: David Brown <davidb@codeaurora.org>
39 lines
1.2 KiB
Plaintext
39 lines
1.2 KiB
Plaintext
* MSM Timer
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Properties:
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- compatible : Should at least contain "qcom,msm-timer". More specific
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properties such as "qcom,msm-gpt" and "qcom,msm-dgt" specify a general
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purpose timer and a debug timer respectively.
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- interrupts : Interrupt indicating a match event.
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- reg : Specifies the base address of the timer registers. The second region
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specifies an optional register used to configure the clock divider.
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- clock-frequency : The frequency of the timer in Hz.
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Optional:
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- cpu-offset : per-cpu offset used when the timer is accessed without the
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CPU remapping facilities. The offset is cpu-offset * cpu-nr.
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Example:
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timer@200a004 {
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compatible = "qcom,msm-gpt", "qcom,msm-timer";
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interrupts = <1 2 0x301>;
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reg = <0x0200a004 0x10>;
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clock-frequency = <32768>;
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cpu-offset = <0x40000>;
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};
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timer@200a024 {
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compatible = "qcom,msm-dgt", "qcom,msm-timer";
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interrupts = <1 3 0x301>;
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reg = <0x0200a024 0x10>,
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<0x0200a034 0x4>;
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clock-frequency = <6750000>;
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cpu-offset = <0x40000>;
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};
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