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78366f69be
Add advanced interrupt moderation support available since "Sparrow B0". Legacy interrupt moderation used only one counter to moderate tx, rx, and misc interrupts. Advanced interrupt moderation bypasses misc, and handles separately tx and rx interrupts. In addition it has two timers for each interrupt type. Max burst duration timer which defines how long to postpone interrupt after first event (receive event for rx and tx complete event for tx), and interframe timeout which defines how to determine the end of the burst and issue interrupt even if the first timer still pending. Capabilities flags in wil_priv is set on initialization according to HW. The rest of the code checks for advanced interrupt capability bit in capabilities flags field. Debugfs is split accordingly: "legacy" interrupt moderation remains unchanged, new debugs files added for advanced interrupt moderation support. Module params are aligned to support advanced interrupt moderation (tx & rx). When not available (for legacy interrupt moderation) will use only rx configuration; Tx configuration will be ignored in this case. Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
327 lines
7.7 KiB
C
327 lines
7.7 KiB
C
/*
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* Copyright (c) 2012-2014 Qualcomm Atheros, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/moduleparam.h>
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#include <linux/interrupt.h>
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#include "wil6210.h"
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static int use_msi = 1;
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module_param(use_msi, int, S_IRUGO);
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MODULE_PARM_DESC(use_msi,
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" Use MSI interrupt: "
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"0 - don't, 1 - (default) - single, or 3");
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static bool debug_fw; /* = false; */
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module_param(debug_fw, bool, S_IRUGO);
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MODULE_PARM_DESC(debug_fw, " load driver if FW not ready. For FW debug");
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static
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void wil_set_capabilities(struct wil6210_priv *wil)
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{
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u32 rev_id = ioread32(wil->csr + HOSTADDR(RGF_USER_JTAG_DEV_ID));
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bitmap_zero(wil->hw_capabilities, hw_capability_last);
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switch (rev_id) {
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case JTAG_DEV_ID_MARLON_B0:
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wil->hw_name = "Marlon B0";
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wil->hw_version = HW_VER_MARLON_B0;
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break;
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case JTAG_DEV_ID_SPARROW_A0:
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wil->hw_name = "Sparrow A0";
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wil->hw_version = HW_VER_SPARROW_A0;
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break;
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case JTAG_DEV_ID_SPARROW_A1:
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wil->hw_name = "Sparrow A1";
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wil->hw_version = HW_VER_SPARROW_A1;
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break;
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case JTAG_DEV_ID_SPARROW_B0:
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wil->hw_name = "Sparrow B0";
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wil->hw_version = HW_VER_SPARROW_B0;
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break;
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default:
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wil_err(wil, "Unknown board hardware 0x%08x\n", rev_id);
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wil->hw_name = "Unknown";
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wil->hw_version = HW_VER_UNKNOWN;
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}
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wil_info(wil, "Board hardware is %s\n", wil->hw_name);
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if (wil->hw_version >= HW_VER_SPARROW_A0)
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set_bit(hw_capability_reset_v2, wil->hw_capabilities);
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if (wil->hw_version >= HW_VER_SPARROW_B0)
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set_bit(hw_capability_advanced_itr_moderation,
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wil->hw_capabilities);
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}
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void wil_disable_irq(struct wil6210_priv *wil)
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{
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int irq = wil->pdev->irq;
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disable_irq(irq);
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if (wil->n_msi == 3) {
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disable_irq(irq + 1);
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disable_irq(irq + 2);
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}
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}
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void wil_enable_irq(struct wil6210_priv *wil)
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{
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int irq = wil->pdev->irq;
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enable_irq(irq);
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if (wil->n_msi == 3) {
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enable_irq(irq + 1);
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enable_irq(irq + 2);
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}
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}
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/* Bus ops */
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static int wil_if_pcie_enable(struct wil6210_priv *wil)
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{
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struct pci_dev *pdev = wil->pdev;
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int rc;
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/* on platforms with buggy ACPI, pdev->msi_enabled may be set to
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* allow pci_enable_device to work. This indicates INTx was not routed
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* and only MSI should be used
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*/
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int msi_only = pdev->msi_enabled;
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wil_dbg_misc(wil, "%s()\n", __func__);
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pdev->msi_enabled = 0;
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pci_set_master(pdev);
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/*
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* how many MSI interrupts to request?
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*/
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switch (use_msi) {
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case 3:
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case 1:
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wil_dbg_misc(wil, "Setup %d MSI interrupts\n", use_msi);
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break;
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case 0:
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wil_dbg_misc(wil, "MSI interrupts disabled, use INTx\n");
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break;
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default:
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wil_err(wil, "Invalid use_msi=%d, default to 1\n", use_msi);
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use_msi = 1;
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}
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if (use_msi == 3 && pci_enable_msi_range(pdev, 3, 3) < 0) {
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wil_err(wil, "3 MSI mode failed, try 1 MSI\n");
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use_msi = 1;
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}
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if (use_msi == 1 && pci_enable_msi(pdev)) {
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wil_err(wil, "pci_enable_msi failed, use INTx\n");
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use_msi = 0;
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}
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wil->n_msi = use_msi;
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if ((wil->n_msi == 0) && msi_only) {
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wil_err(wil, "Interrupt pin not routed, unable to use INTx\n");
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rc = -ENODEV;
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goto stop_master;
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}
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rc = wil6210_init_irq(wil, pdev->irq);
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if (rc)
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goto stop_master;
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/* need reset here to obtain MAC */
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mutex_lock(&wil->mutex);
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rc = wil_reset(wil);
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mutex_unlock(&wil->mutex);
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if (debug_fw)
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rc = 0;
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if (rc)
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goto release_irq;
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return 0;
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release_irq:
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wil6210_fini_irq(wil, pdev->irq);
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/* safe to call if no MSI */
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pci_disable_msi(pdev);
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stop_master:
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pci_clear_master(pdev);
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return rc;
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}
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static int wil_if_pcie_disable(struct wil6210_priv *wil)
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{
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struct pci_dev *pdev = wil->pdev;
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wil_dbg_misc(wil, "%s()\n", __func__);
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pci_clear_master(pdev);
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/* disable and release IRQ */
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wil6210_fini_irq(wil, pdev->irq);
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/* safe to call if no MSI */
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pci_disable_msi(pdev);
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/* TODO: disable HW */
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return 0;
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}
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static int wil_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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struct wil6210_priv *wil;
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struct device *dev = &pdev->dev;
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void __iomem *csr;
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int rc;
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/* check HW */
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dev_info(&pdev->dev, WIL_NAME
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" device found [%04x:%04x] (rev %x)\n",
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(int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
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if (pci_resource_len(pdev, 0) != WIL6210_MEM_SIZE) {
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dev_err(&pdev->dev, "Not " WIL_NAME "? "
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"BAR0 size is %lu while expecting %lu\n",
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(ulong)pci_resource_len(pdev, 0), WIL6210_MEM_SIZE);
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return -ENODEV;
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}
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rc = pci_enable_device(pdev);
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if (rc) {
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dev_err(&pdev->dev,
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"pci_enable_device failed, retry with MSI only\n");
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/* Work around for platforms that can't allocate IRQ:
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* retry with MSI only
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*/
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pdev->msi_enabled = 1;
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rc = pci_enable_device(pdev);
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}
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if (rc)
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return -ENODEV;
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/* rollback to err_disable_pdev */
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rc = pci_request_region(pdev, 0, WIL_NAME);
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if (rc) {
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dev_err(&pdev->dev, "pci_request_region failed\n");
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goto err_disable_pdev;
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}
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/* rollback to err_release_reg */
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csr = pci_ioremap_bar(pdev, 0);
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if (!csr) {
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dev_err(&pdev->dev, "pci_ioremap_bar failed\n");
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rc = -ENODEV;
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goto err_release_reg;
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}
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/* rollback to err_iounmap */
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dev_info(&pdev->dev, "CSR at %pR -> 0x%p\n", &pdev->resource[0], csr);
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wil = wil_if_alloc(dev, csr);
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if (IS_ERR(wil)) {
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rc = (int)PTR_ERR(wil);
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dev_err(dev, "wil_if_alloc failed: %d\n", rc);
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goto err_iounmap;
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}
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/* rollback to if_free */
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pci_set_drvdata(pdev, wil);
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wil->pdev = pdev;
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wil_set_capabilities(wil);
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wil6210_clear_irq(wil);
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wil->platform_handle =
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wil_platform_init(&pdev->dev, &wil->platform_ops);
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/* FW should raise IRQ when ready */
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rc = wil_if_pcie_enable(wil);
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if (rc) {
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wil_err(wil, "Enable device failed\n");
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goto if_free;
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}
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/* rollback to bus_disable */
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rc = wil_if_add(wil);
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if (rc) {
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wil_err(wil, "wil_if_add failed: %d\n", rc);
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goto bus_disable;
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}
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wil6210_debugfs_init(wil);
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/* check FW is alive */
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wmi_echo(wil);
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return 0;
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bus_disable:
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wil_if_pcie_disable(wil);
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if_free:
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if (wil->platform_ops.uninit)
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wil->platform_ops.uninit(wil->platform_handle);
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wil_if_free(wil);
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err_iounmap:
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pci_iounmap(pdev, csr);
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err_release_reg:
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pci_release_region(pdev, 0);
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err_disable_pdev:
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pci_disable_device(pdev);
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return rc;
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}
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static void wil_pcie_remove(struct pci_dev *pdev)
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{
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struct wil6210_priv *wil = pci_get_drvdata(pdev);
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void __iomem *csr = wil->csr;
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wil_dbg_misc(wil, "%s()\n", __func__);
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wil6210_debugfs_remove(wil);
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wil_if_remove(wil);
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wil_if_pcie_disable(wil);
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if (wil->platform_ops.uninit)
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wil->platform_ops.uninit(wil->platform_handle);
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wil_if_free(wil);
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pci_iounmap(pdev, csr);
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pci_release_region(pdev, 0);
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pci_disable_device(pdev);
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}
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static const struct pci_device_id wil6210_pcie_ids[] = {
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{ PCI_DEVICE(0x1ae9, 0x0301) },
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{ PCI_DEVICE(0x1ae9, 0x0310) },
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{ PCI_DEVICE(0x1ae9, 0x0302) }, /* same as above, firmware broken */
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{ /* end: all zeroes */ },
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};
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MODULE_DEVICE_TABLE(pci, wil6210_pcie_ids);
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static struct pci_driver wil6210_driver = {
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.probe = wil_pcie_probe,
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.remove = wil_pcie_remove,
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.id_table = wil6210_pcie_ids,
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.name = WIL_NAME,
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};
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module_pci_driver(wil6210_driver);
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_AUTHOR("Qualcomm Atheros <wil6210@qca.qualcomm.com>");
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MODULE_DESCRIPTION("Driver for 60g WiFi WIL6210 card");
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