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cc155c6f2c
For some platforms, it is inappropriate to register all PXA UARTs. In some cases, the UARTs may not be used, and in others we may want to avoid registering the UARTs to allow other drivers (eg, FICP) to make use of the UART. In addition, a while back there was a request to be able to pass platform data to the UART driver. This patch enables all of this by providing functions platforms can call to register each individual UART. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Mike Rapoport <mike@compulab.co.il> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
607 lines
13 KiB
C
607 lines
13 KiB
C
/*
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* linux/arch/arm/mach-pxa/saar.c
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*
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* Support for the Marvell PXA930 Handheld Platform (aka SAAR)
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*
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* Copyright (C) 2007-2008 Marvell International Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/fb.h>
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#include <linux/i2c.h>
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#include <linux/smc91x.h>
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#include <linux/mfd/da903x.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/onenand.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <mach/pxa930.h>
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#include <plat/i2c.h>
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#include <mach/pxafb.h>
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#include "devices.h"
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#include "generic.h"
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#define GPIO_LCD_RESET (16)
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/* SAAR MFP configurations */
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static mfp_cfg_t saar_mfp_cfg[] __initdata = {
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/* LCD */
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GPIO23_LCD_DD0,
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GPIO24_LCD_DD1,
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GPIO25_LCD_DD2,
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GPIO26_LCD_DD3,
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GPIO27_LCD_DD4,
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GPIO28_LCD_DD5,
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GPIO29_LCD_DD6,
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GPIO44_LCD_DD7,
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GPIO21_LCD_CS,
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GPIO22_LCD_VSYNC,
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GPIO17_LCD_FCLK_RD,
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GPIO18_LCD_LCLK_A0,
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GPIO19_LCD_PCLK_WR,
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GPIO16_GPIO, /* LCD reset */
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/* Ethernet */
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DF_nCS1_nCS3,
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GPIO97_GPIO,
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/* DFI */
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DF_INT_RnB_ND_INT_RnB,
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DF_nRE_nOE_ND_nRE,
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DF_nWE_ND_nWE,
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DF_CLE_nOE_ND_CLE,
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DF_nADV1_ALE_ND_ALE,
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DF_nADV2_ALE_nCS3,
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DF_nCS0_ND_nCS0,
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DF_IO0_ND_IO0,
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DF_IO1_ND_IO1,
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DF_IO2_ND_IO2,
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DF_IO3_ND_IO3,
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DF_IO4_ND_IO4,
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DF_IO5_ND_IO5,
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DF_IO6_ND_IO6,
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DF_IO7_ND_IO7,
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DF_IO8_ND_IO8,
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DF_IO9_ND_IO9,
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DF_IO10_ND_IO10,
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DF_IO11_ND_IO11,
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DF_IO12_ND_IO12,
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DF_IO13_ND_IO13,
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DF_IO14_ND_IO14,
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DF_IO15_ND_IO15,
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};
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#define SAAR_ETH_PHYS (0x14000000)
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = (SAAR_ETH_PHYS + 0x300),
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.end = (SAAR_ETH_PHYS + 0xfffff),
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
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.end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
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}
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};
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static struct smc91x_platdata saar_smc91x_info = {
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.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA,
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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.dev = {
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.platform_data = &saar_smc91x_info,
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},
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};
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#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULE)
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static uint16_t lcd_power_on[] = {
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/* single frame */
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SMART_CMD_NOOP,
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SMART_CMD(0x00),
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SMART_DELAY(0),
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SMART_CMD_NOOP,
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SMART_CMD(0x00),
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SMART_DELAY(0),
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SMART_CMD_NOOP,
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SMART_CMD(0x00),
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SMART_DELAY(0),
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SMART_CMD_NOOP,
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SMART_CMD(0x00),
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SMART_DELAY(10),
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/* calibration control */
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SMART_CMD(0x00),
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SMART_CMD(0xA4),
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SMART_DAT(0x80),
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SMART_DAT(0x01),
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SMART_DELAY(150),
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/*Power-On Init sequence*/
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SMART_CMD(0x00), /* output ctrl */
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SMART_CMD(0x01),
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SMART_DAT(0x01),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* wave ctrl */
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SMART_CMD(0x02),
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SMART_DAT(0x07),
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SMART_DAT(0x00),
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SMART_CMD(0x00),
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SMART_CMD(0x03), /* entry mode */
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SMART_DAT(0xD0),
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SMART_DAT(0x30),
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SMART_CMD(0x00),
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SMART_CMD(0x08), /* display ctrl 2 */
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SMART_DAT(0x08),
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SMART_DAT(0x08),
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SMART_CMD(0x00),
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SMART_CMD(0x09), /* display ctrl 3 */
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SMART_DAT(0x04),
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SMART_DAT(0x2F),
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SMART_CMD(0x00),
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SMART_CMD(0x0A), /* display ctrl 4 */
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SMART_DAT(0x00),
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SMART_DAT(0x08),
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SMART_CMD(0x00),
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SMART_CMD(0x0D), /* Frame Marker position */
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SMART_DAT(0x00),
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SMART_DAT(0x08),
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SMART_CMD(0x00),
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SMART_CMD(0x60), /* Driver output control */
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SMART_DAT(0x27),
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SMART_DAT(0x00),
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SMART_CMD(0x00),
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SMART_CMD(0x61), /* Base image display control */
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SMART_DAT(0x00),
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SMART_DAT(0x01),
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SMART_CMD(0x00),
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SMART_CMD(0x30), /* Y settings 30h-3Dh */
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SMART_DAT(0x07),
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SMART_DAT(0x07),
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SMART_CMD(0x00),
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SMART_CMD(0x31),
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SMART_DAT(0x00),
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SMART_DAT(0x07),
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SMART_CMD(0x00),
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SMART_CMD(0x32), /* Timing(3), ASW HOLD=0.5CLK */
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SMART_DAT(0x04),
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SMART_DAT(0x00),
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SMART_CMD(0x00),
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SMART_CMD(0x33), /* Timing(4), CKV ST=0CLK, CKV ED=1CLK */
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SMART_DAT(0x03),
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SMART_DAT(0x03),
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SMART_CMD(0x00),
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SMART_CMD(0x34),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_CMD(0x00),
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SMART_CMD(0x35),
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SMART_DAT(0x02),
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SMART_DAT(0x05),
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SMART_CMD(0x00),
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SMART_CMD(0x36),
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SMART_DAT(0x1F),
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SMART_DAT(0x1F),
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SMART_CMD(0x00),
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SMART_CMD(0x37),
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SMART_DAT(0x07),
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SMART_DAT(0x07),
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SMART_CMD(0x00),
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SMART_CMD(0x38),
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SMART_DAT(0x00),
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SMART_DAT(0x07),
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SMART_CMD(0x00),
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SMART_CMD(0x39),
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SMART_DAT(0x04),
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SMART_DAT(0x00),
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SMART_CMD(0x00),
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SMART_CMD(0x3A),
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SMART_DAT(0x03),
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SMART_DAT(0x03),
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SMART_CMD(0x00),
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SMART_CMD(0x3B),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_CMD(0x00),
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SMART_CMD(0x3C),
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SMART_DAT(0x02),
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SMART_DAT(0x05),
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SMART_CMD(0x00),
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SMART_CMD(0x3D),
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SMART_DAT(0x1F),
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SMART_DAT(0x1F),
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SMART_CMD(0x00), /* Display control 1 */
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SMART_CMD(0x07),
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SMART_DAT(0x00),
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SMART_DAT(0x01),
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SMART_CMD(0x00), /* Power control 5 */
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SMART_CMD(0x17),
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SMART_DAT(0x00),
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SMART_DAT(0x01),
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SMART_CMD(0x00), /* Power control 1 */
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SMART_CMD(0x10),
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SMART_DAT(0x10),
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SMART_DAT(0xB0),
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SMART_CMD(0x00), /* Power control 2 */
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SMART_CMD(0x11),
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SMART_DAT(0x01),
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SMART_DAT(0x30),
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SMART_CMD(0x00), /* Power control 3 */
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SMART_CMD(0x12),
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SMART_DAT(0x01),
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SMART_DAT(0x9E),
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SMART_CMD(0x00), /* Power control 4 */
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SMART_CMD(0x13),
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SMART_DAT(0x17),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* Power control 3 */
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SMART_CMD(0x12),
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SMART_DAT(0x01),
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SMART_DAT(0xBE),
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SMART_DELAY(100),
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/* display mode : 240*320 */
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SMART_CMD(0x00), /* RAM address set(H) 0*/
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SMART_CMD(0x20),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* RAM address set(V) 4*/
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SMART_CMD(0x21),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* Start of Window RAM address set(H) 8*/
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SMART_CMD(0x50),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* End of Window RAM address set(H) 12*/
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SMART_CMD(0x51),
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SMART_DAT(0x00),
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SMART_DAT(0xEF),
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SMART_CMD(0x00), /* Start of Window RAM address set(V) 16*/
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SMART_CMD(0x52),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* End of Window RAM address set(V) 20*/
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SMART_CMD(0x53),
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SMART_DAT(0x01),
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SMART_DAT(0x3F),
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SMART_CMD(0x00), /* Panel interface control 1 */
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SMART_CMD(0x90),
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SMART_DAT(0x00),
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SMART_DAT(0x1A),
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SMART_CMD(0x00), /* Panel interface control 2 */
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SMART_CMD(0x92),
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SMART_DAT(0x04),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* Panel interface control 3 */
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SMART_CMD(0x93),
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SMART_DAT(0x00),
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SMART_DAT(0x05),
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SMART_DELAY(20),
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};
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static uint16_t lcd_panel_on[] = {
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SMART_CMD(0x00),
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SMART_CMD(0x07),
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SMART_DAT(0x00),
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SMART_DAT(0x21),
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SMART_DELAY(1),
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SMART_CMD(0x00),
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SMART_CMD(0x07),
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SMART_DAT(0x00),
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SMART_DAT(0x61),
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SMART_DELAY(100),
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SMART_CMD(0x00),
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SMART_CMD(0x07),
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SMART_DAT(0x01),
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SMART_DAT(0x73),
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SMART_DELAY(1),
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};
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static uint16_t lcd_panel_off[] = {
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SMART_CMD(0x00),
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SMART_CMD(0x07),
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SMART_DAT(0x00),
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SMART_DAT(0x72),
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SMART_DELAY(40),
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SMART_CMD(0x00),
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SMART_CMD(0x07),
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SMART_DAT(0x00),
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SMART_DAT(0x01),
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SMART_DELAY(1),
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SMART_CMD(0x00),
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SMART_CMD(0x07),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_DELAY(1),
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};
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static uint16_t lcd_power_off[] = {
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SMART_CMD(0x00),
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SMART_CMD(0x10),
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SMART_DAT(0x00),
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SMART_DAT(0x80),
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SMART_CMD(0x00),
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SMART_CMD(0x11),
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SMART_DAT(0x01),
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SMART_DAT(0x60),
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SMART_CMD(0x00),
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SMART_CMD(0x12),
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SMART_DAT(0x01),
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SMART_DAT(0xAE),
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SMART_DELAY(40),
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SMART_CMD(0x00),
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SMART_CMD(0x10),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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};
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static uint16_t update_framedata[] = {
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/* set display ram: 240*320 */
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SMART_CMD(0x00), /* RAM address set(H) 0*/
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SMART_CMD(0x20),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* RAM address set(V) 4*/
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SMART_CMD(0x21),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* Start of Window RAM address set(H) 8 */
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SMART_CMD(0x50),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* End of Window RAM address set(H) 12 */
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SMART_CMD(0x51),
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SMART_DAT(0x00),
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SMART_DAT(0xEF),
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SMART_CMD(0x00), /* Start of Window RAM address set(V) 16 */
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SMART_CMD(0x52),
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SMART_DAT(0x00),
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SMART_DAT(0x00),
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SMART_CMD(0x00), /* End of Window RAM address set(V) 20 */
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SMART_CMD(0x53),
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SMART_DAT(0x01),
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SMART_DAT(0x3F),
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/* wait for vsync cmd before transferring frame data */
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SMART_CMD_WAIT_FOR_VSYNC,
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/* write ram */
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SMART_CMD(0x00),
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SMART_CMD(0x22),
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/* write frame data */
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SMART_CMD_WRITE_FRAME,
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};
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static void ltm022a97a_lcd_power(int on, struct fb_var_screeninfo *var)
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{
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static int pin_requested = 0;
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struct fb_info *info = container_of(var, struct fb_info, var);
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int err;
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if (!pin_requested) {
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err = gpio_request(GPIO_LCD_RESET, "lcd reset");
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if (err) {
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pr_err("failed to request gpio for LCD reset\n");
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return;
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}
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gpio_direction_output(GPIO_LCD_RESET, 0);
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pin_requested = 1;
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}
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if (on) {
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gpio_set_value(GPIO_LCD_RESET, 0); msleep(100);
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gpio_set_value(GPIO_LCD_RESET, 1); msleep(10);
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pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_power_on));
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pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_panel_on));
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} else {
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pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_panel_off));
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pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_power_off));
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}
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err = pxafb_smart_flush(info);
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if (err)
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pr_err("%s: timed out\n", __func__);
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}
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static void ltm022a97a_update(struct fb_info *info)
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{
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pxafb_smart_queue(info, ARRAY_AND_SIZE(update_framedata));
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pxafb_smart_flush(info);
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}
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static struct pxafb_mode_info toshiba_ltm022a97a_modes[] = {
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[0] = {
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.xres = 240,
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.yres = 320,
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.bpp = 16,
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.a0csrd_set_hld = 30,
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.a0cswr_set_hld = 30,
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.wr_pulse_width = 30,
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.rd_pulse_width = 30,
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.op_hold_time = 30,
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.cmd_inh_time = 60,
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/* L_LCLK_A0 and L_LCLK_RD active low */
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.sync = FB_SYNC_HOR_HIGH_ACT |
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FB_SYNC_VERT_HIGH_ACT,
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},
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};
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static struct pxafb_mach_info saar_lcd_info = {
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.modes = toshiba_ltm022a97a_modes,
|
|
.num_modes = 1,
|
|
.lcd_conn = LCD_SMART_PANEL_8BPP | LCD_PCLK_EDGE_FALL,
|
|
.pxafb_lcd_power = ltm022a97a_lcd_power,
|
|
.smart_update = ltm022a97a_update,
|
|
};
|
|
|
|
static void __init saar_init_lcd(void)
|
|
{
|
|
set_pxa_fb_info(&saar_lcd_info);
|
|
}
|
|
#else
|
|
static inline void saar_init_lcd(void) {}
|
|
#endif
|
|
|
|
#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
|
|
static struct da9034_backlight_pdata saar_da9034_backlight = {
|
|
.output_current = 4, /* 4mA */
|
|
};
|
|
|
|
static struct da903x_subdev_info saar_da9034_subdevs[] = {
|
|
[0] = {
|
|
.name = "da903x-backlight",
|
|
.id = DA9034_ID_WLED,
|
|
.platform_data = &saar_da9034_backlight,
|
|
},
|
|
};
|
|
|
|
static struct da903x_platform_data saar_da9034_info = {
|
|
.num_subdevs = ARRAY_SIZE(saar_da9034_subdevs),
|
|
.subdevs = saar_da9034_subdevs,
|
|
};
|
|
|
|
static struct i2c_board_info saar_i2c_info[] = {
|
|
[0] = {
|
|
.type = "da9034",
|
|
.addr = 0x34,
|
|
.platform_data = &saar_da9034_info,
|
|
.irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)),
|
|
},
|
|
};
|
|
|
|
static void __init saar_init_i2c(void)
|
|
{
|
|
pxa_set_i2c_info(NULL);
|
|
i2c_register_board_info(0, ARRAY_AND_SIZE(saar_i2c_info));
|
|
}
|
|
#else
|
|
static inline void saar_init_i2c(void) {}
|
|
#endif
|
|
|
|
#if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE)
|
|
static struct mtd_partition saar_onenand_partitions[] = {
|
|
{
|
|
.name = "bootloader",
|
|
.offset = 0,
|
|
.size = SZ_1M,
|
|
.mask_flags = MTD_WRITEABLE,
|
|
}, {
|
|
.name = "reserved",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = SZ_128K,
|
|
.mask_flags = MTD_WRITEABLE,
|
|
}, {
|
|
.name = "reserved",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = SZ_8M,
|
|
.mask_flags = MTD_WRITEABLE,
|
|
}, {
|
|
.name = "kernel",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = (SZ_2M + SZ_1M),
|
|
.mask_flags = 0,
|
|
}, {
|
|
.name = "filesystem",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = SZ_48M,
|
|
.mask_flags = 0,
|
|
}
|
|
};
|
|
|
|
static struct onenand_platform_data saar_onenand_info = {
|
|
.parts = saar_onenand_partitions,
|
|
.nr_parts = ARRAY_SIZE(saar_onenand_partitions),
|
|
};
|
|
|
|
#define SMC_CS0_PHYS_BASE (0x10000000)
|
|
|
|
static struct resource saar_resource_onenand[] = {
|
|
[0] = {
|
|
.start = SMC_CS0_PHYS_BASE,
|
|
.end = SMC_CS0_PHYS_BASE + SZ_1M,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
};
|
|
|
|
static struct platform_device saar_device_onenand = {
|
|
.name = "onenand-flash",
|
|
.id = -1,
|
|
.dev = {
|
|
.platform_data = &saar_onenand_info,
|
|
},
|
|
.resource = saar_resource_onenand,
|
|
.num_resources = ARRAY_SIZE(saar_resource_onenand),
|
|
};
|
|
|
|
static void __init saar_init_onenand(void)
|
|
{
|
|
platform_device_register(&saar_device_onenand);
|
|
}
|
|
#else
|
|
static void __init saar_init_onenand(void) {}
|
|
#endif
|
|
|
|
static void __init saar_init(void)
|
|
{
|
|
/* initialize MFP configurations */
|
|
pxa3xx_mfp_config(ARRAY_AND_SIZE(saar_mfp_cfg));
|
|
|
|
pxa_set_ffuart_info(NULL);
|
|
pxa_set_btuart_info(NULL);
|
|
pxa_set_stuart_info(NULL);
|
|
|
|
platform_device_register(&smc91x_device);
|
|
saar_init_onenand();
|
|
|
|
saar_init_i2c();
|
|
saar_init_lcd();
|
|
}
|
|
|
|
MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
|
|
/* Maintainer: Eric Miao <eric.miao@marvell.com> */
|
|
.phys_io = 0x40000000,
|
|
.boot_params = 0xa0000100,
|
|
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
|
|
.map_io = pxa_map_io,
|
|
.init_irq = pxa3xx_init_irq,
|
|
.timer = &pxa_timer,
|
|
.init_machine = saar_init,
|
|
MACHINE_END
|