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This patch adds initial support for Renesas SH-Mobile AG5. At this point the AG5 CPU support is limited to the ARM core, SCIF serial and a CMT timer together with L2 cache and the GIC. The AG5EVM board also supports Ethernet. Future patches will add support for GPIO, INTCS, CPGA and platform data / driver updates for devices such as IIC, LCDC, FSI, KEYSC, CEU and SDHI among others. The code in entry-macro.S will be cleaned up when the ARM IRQ demux code improvements have been merged. Depends on the AG5EVM mach-type recently registered but not yet present in arch/arm/tools/mach-types. As the AG5EVM board comes with 512MiB memory it is recommended to turn on HIGHMEM. Many thanks to Yoshii-san for initial bring up. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
19 lines
428 B
C
19 lines
428 B
C
#ifndef __ASM_MACH_IRQS_H
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#define __ASM_MACH_IRQS_H
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#define NR_IRQS 512
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/* GIC */
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#define gic_spi(nr) ((nr) + 32)
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/* INTCA */
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#define evt2irq(evt) (((evt) >> 5) - 16)
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#define irq2evt(irq) (((irq) + 16) << 5)
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/* INTCS */
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#define INTCS_VECT_BASE 0x2200
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#define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect))
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#define intcs_evt2irq(evt) evt2irq(INTCS_VECT_BASE + (evt))
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#endif /* __ASM_MACH_IRQS_H */
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