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Improve the binding example by removing all the leading zeros to fix the following dtc warnings: Warning (unit_address_format): Node /XXX unit name should not have leading 0s Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find ./Documentation/devicetree/bindings "*.txt"` Some unnecessary changes were manually fixed. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Signed-off-by: Rob Herring <robh@kernel.org>
92 lines
3.1 KiB
Plaintext
92 lines
3.1 KiB
Plaintext
TI SysCon Reset Controller
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=======================
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Almost all SoCs have hardware modules that require reset control in addition
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to clock and power control for their functionality. The reset control is
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typically provided by means of memory-mapped I/O registers. These registers are
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sometimes a part of a larger register space region implementing various
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functionalities. This register range is best represented as a syscon node to
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allow multiple entities to access their relevant registers in the common
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register space.
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A SysCon Reset Controller node defines a device that uses a syscon node
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and provides reset management functionality for various hardware modules
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present on the SoC.
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SysCon Reset Controller Node
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============================
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Each of the reset provider/controller nodes should be a child of a syscon
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node and have the following properties.
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Required properties:
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--------------------
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- compatible : Should be,
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"ti,k2e-pscrst"
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"ti,k2l-pscrst"
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"ti,k2hk-pscrst"
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"ti,syscon-reset"
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- #reset-cells : Should be 1. Please see the reset consumer node below
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for usage details
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- ti,reset-bits : Contains the reset control register information
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Should contain 7 cells for each reset exposed to
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consumers, defined as:
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Cell #1 : offset of the reset assert control
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register from the syscon register base
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Cell #2 : bit position of the reset in the reset
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assert control register
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Cell #3 : offset of the reset deassert control
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register from the syscon register base
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Cell #4 : bit position of the reset in the reset
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deassert control register
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Cell #5 : offset of the reset status register
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from the syscon register base
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Cell #6 : bit position of the reset in the
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reset status register
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Cell #7 : Flags used to control reset behavior,
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availible flags defined in the DT include
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file <dt-bindings/reset/ti-syscon.h>
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SysCon Reset Consumer Nodes
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===========================
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Each of the reset consumer nodes should have the following properties,
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in addition to their own properties.
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Required properties:
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--------------------
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- resets : A phandle to the reset controller node and an index number
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to a reset specifier as defined above.
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Please also refer to Documentation/devicetree/bindings/reset/reset.txt for
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common reset controller usage by consumers.
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Example:
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--------
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The following example demonstrates a syscon node, the reset controller node
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using the syscon node, and a consumer (a DSP device) on the TI Keystone 2
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66AK2E SoC.
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/ {
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soc {
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psc: power-sleep-controller@2350000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x02350000 0x1000>;
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pscrst: reset-controller {
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compatible = "ti,k2e-pscrst", "ti,syscon-reset";
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#reset-cells = <1>;
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ti,reset-bits = <
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0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
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0xa40 5 0xa44 3 0 0 (ASSERT_SET | DEASSERT_CLEAR | STATUS_NONE) /* 1: example */
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>;
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};
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};
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dsp0: dsp0 {
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...
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resets = <&pscrst 0>;
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...
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};
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};
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};
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