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The HSIC USB controller on qcom SoCs has an integrated all digital phy controlled via the ULPI viewport. Cc: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Rob Herring <robh@kernel.org> Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
66 lines
1.6 KiB
Plaintext
66 lines
1.6 KiB
Plaintext
Qualcomm's USB HSIC PHY
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PROPERTIES
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- compatible:
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Usage: required
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Value type: <string>
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Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the
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following:
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"qcom,usb-hsic-phy-mdm9615"
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"qcom,usb-hsic-phy-msm8974"
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- #phy-cells:
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Usage: required
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Value type: <u32>
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Definition: Should contain 0
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- clocks:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Should contain clock specifier for phy, calibration and
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a calibration sleep clock
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- clock-names:
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Usage: required
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Value type: <stringlist>
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Definition: Should contain "phy, "cal" and "cal_sleep"
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- pinctrl-names:
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Usage: required
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Value type: <stringlist>
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Definition: Should contain "init" and "default" in that order
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- pinctrl-0:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
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free state
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- pinctrl-1:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: List of pinctrl settings to apply to mux out the HSIC pins
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EXAMPLE
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usb-controller {
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ulpi {
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phy {
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compatible = "qcom,usb-hsic-phy-msm8974",
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"qcom,usb-hsic-phy";
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#phy-cells = <0>;
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pinctrl-names = "init", "default";
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pinctrl-0 = <&hsic_sleep>;
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pinctrl-1 = <&hsic_default>;
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clocks = <&gcc GCC_USB_HSIC_CLK>,
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<&gcc GCC_USB_HSIC_IO_CAL_CLK>,
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<&gcc GCC_USB_HSIC_IO_CAL_SLEEP_CLK>;
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clock-names = "phy", "cal", "cal_sleep";
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assigned-clocks = <&gcc GCC_USB_HSIC_IO_CAL_CLK>;
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assigned-clock-rates = <960000>;
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};
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};
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};
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