mirror of
https://github.com/torvalds/linux.git
synced 2024-12-30 14:52:05 +00:00
405990c7e8
Needed to properly decode the RAM code register. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
15 lines
696 B
Plaintext
15 lines
696 B
Plaintext
NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 apbmisc block
|
|
|
|
Required properties:
|
|
- compatible : For Tegra20, must be "nvidia,tegra20-apbmisc". For Tegra30,
|
|
must be "nvidia,tegra30-apbmisc". Otherwise, must contain
|
|
"nvidia,<chip>-apbmisc", plus one of the above, where <chip> is tegra114,
|
|
tegra124, tegra132.
|
|
- reg: Should contain 2 entries: the first entry gives the physical address
|
|
and length of the registers which contain revision and debug features.
|
|
The second entry gives the physical address and length of the
|
|
registers indicating the strapping options.
|
|
|
|
Optional properties:
|
|
- nvidia,long-ram-code: If present, the RAM code is long (4 bit). If not, short (2 bit).
|