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The ep93xx DMA controller has 10 independent memory to peripheral (M2P) channels, and 2 dedicated memory to memory (M2M) channels. M2M channels can also be used by SPI and IDE to perform DMA transfers to/from their memory mapped FIFOs. This driver supports both M2P and M2M channels with DMA_SLAVE, DMA_CYCLIC and DMA_MEMCPY (M2M only) capabilities. Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi> Signed-off-by: Ryan Mallon <rmallon@gmail.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
29 lines
1.0 KiB
Makefile
29 lines
1.0 KiB
Makefile
ccflags-$(CONFIG_DMADEVICES_DEBUG) := -DDEBUG
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ccflags-$(CONFIG_DMADEVICES_VDEBUG) += -DVERBOSE_DEBUG
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obj-$(CONFIG_DMA_ENGINE) += dmaengine.o
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obj-$(CONFIG_NET_DMA) += iovlock.o
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obj-$(CONFIG_INTEL_MID_DMAC) += intel_mid_dma.o
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obj-$(CONFIG_DMATEST) += dmatest.o
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obj-$(CONFIG_INTEL_IOATDMA) += ioat/
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obj-$(CONFIG_INTEL_IOP_ADMA) += iop-adma.o
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obj-$(CONFIG_FSL_DMA) += fsldma.o
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obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o
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obj-$(CONFIG_MV_XOR) += mv_xor.o
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obj-$(CONFIG_DW_DMAC) += dw_dmac.o
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obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
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obj-$(CONFIG_MX3_IPU) += ipu/
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obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
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obj-$(CONFIG_SH_DMAE) += shdma.o
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obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o
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obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += ppc4xx/
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obj-$(CONFIG_IMX_SDMA) += imx-sdma.o
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obj-$(CONFIG_IMX_DMA) += imx-dma.o
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obj-$(CONFIG_MXS_DMA) += mxs-dma.o
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obj-$(CONFIG_TIMB_DMA) += timb_dma.o
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obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o
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obj-$(CONFIG_PL330_DMA) += pl330.o
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obj-$(CONFIG_PCH_DMA) += pch_dma.o
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obj-$(CONFIG_AMBA_PL08X) += amba-pl08x.o
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obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
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