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cd3a77a085
Various small clock controllers only have clock gates, and utilize
mtk_clk_simple_probe() as their driver probe function.
Now that we have a matching remove function, hook it up for the relevant
drivers. This was done with the following command:
sed -i -e '/mtk_clk_simple_probe/a \
.remove = mtk_clk_simple_remove,' drivers/clk/mediatek/clk-mt8195-*.c
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220208124034.414635-29-wenst@chromium.org
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
68 lines
2.2 KiB
C
68 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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//
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// Copyright (c) 2021 MediaTek Inc.
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// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
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#include "clk-gate.h"
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#include "clk-mtk.h"
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#include <dt-bindings/clock/mt8195-clk.h>
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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static const struct mtk_gate_regs imp_iic_wrap_cg_regs = {
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.set_ofs = 0xe08,
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.clr_ofs = 0xe04,
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.sta_ofs = 0xe00,
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};
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#define GATE_IMP_IIC_WRAP(_id, _name, _parent, _shift) \
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GATE_MTK_FLAGS(_id, _name, _parent, &imp_iic_wrap_cg_regs, _shift, \
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&mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE)
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static const struct mtk_gate imp_iic_wrap_s_clks[] = {
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_S_I2C5, "imp_iic_wrap_s_i2c5", "top_i2c", 0),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_S_I2C6, "imp_iic_wrap_s_i2c6", "top_i2c", 1),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_S_I2C7, "imp_iic_wrap_s_i2c7", "top_i2c", 2),
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};
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static const struct mtk_gate imp_iic_wrap_w_clks[] = {
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_I2C0, "imp_iic_wrap_w_i2c0", "top_i2c", 0),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_I2C1, "imp_iic_wrap_w_i2c1", "top_i2c", 1),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_I2C2, "imp_iic_wrap_w_i2c2", "top_i2c", 2),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_I2C3, "imp_iic_wrap_w_i2c3", "top_i2c", 3),
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GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_I2C4, "imp_iic_wrap_w_i2c4", "top_i2c", 4),
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};
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static const struct mtk_clk_desc imp_iic_wrap_s_desc = {
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.clks = imp_iic_wrap_s_clks,
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.num_clks = ARRAY_SIZE(imp_iic_wrap_s_clks),
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};
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static const struct mtk_clk_desc imp_iic_wrap_w_desc = {
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.clks = imp_iic_wrap_w_clks,
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.num_clks = ARRAY_SIZE(imp_iic_wrap_w_clks),
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};
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static const struct of_device_id of_match_clk_mt8195_imp_iic_wrap[] = {
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{
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.compatible = "mediatek,mt8195-imp_iic_wrap_s",
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.data = &imp_iic_wrap_s_desc,
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}, {
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.compatible = "mediatek,mt8195-imp_iic_wrap_w",
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.data = &imp_iic_wrap_w_desc,
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}, {
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/* sentinel */
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}
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};
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static struct platform_driver clk_mt8195_imp_iic_wrap_drv = {
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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.driver = {
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.name = "clk-mt8195-imp_iic_wrap",
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.of_match_table = of_match_clk_mt8195_imp_iic_wrap,
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},
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};
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builtin_platform_driver(clk_mt8195_imp_iic_wrap_drv);
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