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Both PIN_PINGROUP_ENTRY_Y() and DRV_PINGROUP_ENTRY_Y() macros are called for each of the 2 pin groups defined here, and both of them initialise 'drv_reg', causing the compiler to complain. Only initialise 'drv_reg' once. Fixes the following W=1 kernel build warning(s): drivers/pinctrl/tegra/pinctrl-tegra194.c:71:14: warning: initialized field overwritten [-Woverride-init] 71 | .drv_reg = ((r)), | ^ drivers/pinctrl/tegra/pinctrl-tegra194.c:105:2: note: in expansion of macro ‘DRV_PINGROUP_ENTRY_Y’ 105 | DRV_PINGROUP_ENTRY_Y(0x14004, 12, 5, 20, 5, -1, -1, -1, -1, 0) | ^~~~~~~~~~~~~~~~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:124:3: note: in expansion of macro ‘drive_pex_l5_clkreq_n_pgg0’ 124 | drive_##pg_name, | ^~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:128:2: note: in expansion of macro ‘PINGROUP’ 128 | PINGROUP(pex_l5_clkreq_n_pgg0, PE5, RSVD1, RSVD2, RSVD3, 0x14000, 0, | ^~~~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:71:14: note: (near initialization for ‘tegra194_groups[0].drv_reg’) 71 | .drv_reg = ((r)), | ^ drivers/pinctrl/tegra/pinctrl-tegra194.c:105:2: note: in expansion of macro ‘DRV_PINGROUP_ENTRY_Y’ 105 | DRV_PINGROUP_ENTRY_Y(0x14004, 12, 5, 20, 5, -1, -1, -1, -1, 0) | ^~~~~~~~~~~~~~~~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:124:3: note: in expansion of macro ‘drive_pex_l5_clkreq_n_pgg0’ 124 | drive_##pg_name, | ^~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:128:2: note: in expansion of macro ‘PINGROUP’ 128 | PINGROUP(pex_l5_clkreq_n_pgg0, PE5, RSVD1, RSVD2, RSVD3, 0x14000, 0, | ^~~~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:71:14: warning: initialized field overwritten [-Woverride-init] 71 | .drv_reg = ((r)), | ^ drivers/pinctrl/tegra/pinctrl-tegra194.c:107:2: note: in expansion of macro ‘DRV_PINGROUP_ENTRY_Y’ 107 | DRV_PINGROUP_ENTRY_Y(0x1400c, 12, 5, 20, 5, -1, -1, -1, -1, 0) | ^~~~~~~~~~~~~~~~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:124:3: note: in expansion of macro ‘drive_pex_l5_rst_n_pgg1’ 124 | drive_##pg_name, | ^~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:130:2: note: in expansion of macro ‘PINGROUP’ 130 | PINGROUP(pex_l5_rst_n_pgg1, PE5, RSVD1, RSVD2, RSVD3, 0x14008, 0, | ^~~~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:71:14: note: (near initialization for ‘tegra194_groups[1].drv_reg’) 71 | .drv_reg = ((r)), | ^ drivers/pinctrl/tegra/pinctrl-tegra194.c:107:2: note: in expansion of macro ‘DRV_PINGROUP_ENTRY_Y’ 107 | DRV_PINGROUP_ENTRY_Y(0x1400c, 12, 5, 20, 5, -1, -1, -1, -1, 0) | ^~~~~~~~~~~~~~~~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:124:3: note: in expansion of macro ‘drive_pex_l5_rst_n_pgg1’ 124 | drive_##pg_name, | ^~~~~~ drivers/pinctrl/tegra/pinctrl-tegra194.c:130:2: note: in expansion of macro ‘PINGROUP’ 130 | PINGROUP(pex_l5_rst_n_pgg1, PE5, RSVD1, RSVD2, RSVD3, 0x14008, 0, | ^~~~~~~~ Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-tegra@vger.kernel.org Link: https://lore.kernel.org/r/20200713144930.1034632-23-lee.jones@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
169 lines
4.6 KiB
C
169 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Pinctrl data for the NVIDIA Tegra194 pinmux
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*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include "pinctrl-tegra.h"
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/* Define unique ID for each pins */
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enum pin_id {
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TEGRA_PIN_PEX_L5_CLKREQ_N_PGG0,
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TEGRA_PIN_PEX_L5_RST_N_PGG1,
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};
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/* Table for pin descriptor */
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static const struct pinctrl_pin_desc tegra194_pins[] = {
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PINCTRL_PIN(TEGRA_PIN_PEX_L5_CLKREQ_N_PGG0, "PEX_L5_CLKREQ_N_PGG0"),
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PINCTRL_PIN(TEGRA_PIN_PEX_L5_RST_N_PGG1, "PEX_L5_RST_N_PGG1"),
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};
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static const unsigned int pex_l5_clkreq_n_pgg0_pins[] = {
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TEGRA_PIN_PEX_L5_CLKREQ_N_PGG0,
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};
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static const unsigned int pex_l5_rst_n_pgg1_pins[] = {
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TEGRA_PIN_PEX_L5_RST_N_PGG1,
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};
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/* Define unique ID for each function */
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enum tegra_mux_dt {
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TEGRA_MUX_RSVD0,
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TEGRA_MUX_RSVD1,
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TEGRA_MUX_RSVD2,
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TEGRA_MUX_RSVD3,
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TEGRA_MUX_PE5,
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};
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/* Make list of each function name */
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#define TEGRA_PIN_FUNCTION(lid) \
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{ \
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.name = #lid, \
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}
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static struct tegra_function tegra194_functions[] = {
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TEGRA_PIN_FUNCTION(rsvd0),
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TEGRA_PIN_FUNCTION(rsvd1),
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TEGRA_PIN_FUNCTION(rsvd2),
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TEGRA_PIN_FUNCTION(rsvd3),
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TEGRA_PIN_FUNCTION(pe5),
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};
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#define DRV_PINGROUP_ENTRY_Y(r, drvdn_b, drvdn_w, drvup_b, \
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drvup_w, slwr_b, slwr_w, slwf_b, \
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slwf_w, bank) \
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.drv_reg = ((r)), \
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.drv_bank = bank, \
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.drvdn_bit = drvdn_b, \
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.drvdn_width = drvdn_w, \
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.drvup_bit = drvup_b, \
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.drvup_width = drvup_w, \
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.slwr_bit = slwr_b, \
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.slwr_width = slwr_w, \
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.slwf_bit = slwf_b, \
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.slwf_width = slwf_w
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#define PIN_PINGROUP_ENTRY_Y(r, bank, pupd, e_lpbk, e_input, \
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e_od, schmitt_b, drvtype) \
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.mux_reg = ((r)), \
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.lpmd_bit = -1, \
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.lock_bit = -1, \
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.hsm_bit = -1, \
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.mux_bank = bank, \
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.mux_bit = 0, \
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.pupd_reg = ((r)), \
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.pupd_bank = bank, \
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.pupd_bit = 2, \
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.tri_reg = ((r)), \
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.tri_bank = bank, \
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.tri_bit = 4, \
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.einput_bit = e_input, \
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.odrain_bit = e_od, \
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.sfsel_bit = 10, \
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.schmitt_bit = schmitt_b, \
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.drvtype_bit = 13, \
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.parked_bitmask = 0
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#define drive_pex_l5_clkreq_n_pgg0 \
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DRV_PINGROUP_ENTRY_Y(0x14004, 12, 5, 20, 5, -1, -1, -1, -1, 0)
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#define drive_pex_l5_rst_n_pgg1 \
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DRV_PINGROUP_ENTRY_Y(0x1400c, 12, 5, 20, 5, -1, -1, -1, -1, 0)
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#define PINGROUP(pg_name, f0, f1, f2, f3, r, bank, pupd, e_lpbk, \
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e_input, e_lpdr, e_od, schmitt_b, drvtype, io_rail) \
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{ \
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.name = #pg_name, \
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.pins = pg_name##_pins, \
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.npins = ARRAY_SIZE(pg_name##_pins), \
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.funcs = { \
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TEGRA_MUX_##f0, \
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TEGRA_MUX_##f1, \
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TEGRA_MUX_##f2, \
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TEGRA_MUX_##f3, \
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}, \
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PIN_PINGROUP_ENTRY_Y(r, bank, pupd, e_lpbk, \
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e_input, e_od, \
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schmitt_b, drvtype), \
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drive_##pg_name, \
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}
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static const struct tegra_pingroup tegra194_groups[] = {
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PINGROUP(pex_l5_clkreq_n_pgg0, PE5, RSVD1, RSVD2, RSVD3, 0x14000, 0,
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Y, -1, 6, 8, 11, 12, N, "vddio_pex_ctl_2"),
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PINGROUP(pex_l5_rst_n_pgg1, PE5, RSVD1, RSVD2, RSVD3, 0x14008, 0,
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Y, -1, 6, 8, 11, 12, N, "vddio_pex_ctl_2"),
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};
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static const struct tegra_pinctrl_soc_data tegra194_pinctrl = {
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.pins = tegra194_pins,
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.npins = ARRAY_SIZE(tegra194_pins),
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.functions = tegra194_functions,
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.nfunctions = ARRAY_SIZE(tegra194_functions),
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.groups = tegra194_groups,
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.ngroups = ARRAY_SIZE(tegra194_groups),
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.hsm_in_mux = true,
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.schmitt_in_mux = true,
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.drvtype_in_mux = true,
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.sfsel_in_mux = true,
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};
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static int tegra194_pinctrl_probe(struct platform_device *pdev)
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{
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return tegra_pinctrl_probe(pdev, &tegra194_pinctrl);
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}
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static const struct of_device_id tegra194_pinctrl_of_match[] = {
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{ .compatible = "nvidia,tegra194-pinmux", },
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{ },
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};
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static struct platform_driver tegra194_pinctrl_driver = {
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.driver = {
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.name = "tegra194-pinctrl",
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.of_match_table = tegra194_pinctrl_of_match,
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},
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.probe = tegra194_pinctrl_probe,
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};
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static int __init tegra194_pinctrl_init(void)
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{
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return platform_driver_register(&tegra194_pinctrl_driver);
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}
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arch_initcall(tegra194_pinctrl_init);
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