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25824d52ca
In most of hisilicon SOCs, reset controller and clock provider are combined together as a block named CRG (Clock and Reset Generator). This patch mainly implements the reset function. Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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clk-hi3620.c | ||
clk-hi6220-stub.c | ||
clk-hi6220.c | ||
clk-hip04.c | ||
clk-hix5hd2.c | ||
clk.c | ||
clk.h | ||
clkdivider-hi6220.c | ||
clkgate-separated.c | ||
Kconfig | ||
Makefile | ||
reset.c | ||
reset.h |