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c4fe57f762
The commitdd11444327("spi: dw-spi: Convert 16bit accesses to 32bit accesses") changed all 16bit accesses in the DW_apb_ssi driver to 32bit. This, unfortunately, breaks data register access on picoXcell, where the DW IP needs data register accesses to be word accesses (all other accesses appear to be OK). This change introduces a new master variable to allow interface drivers to specify that 16bit data transfer I/O is required. This change also introduces the ability to set this variable via device tree bindings in the MMIO interface driver. Both the core and the MMIO interface driver default to the current 32bit behaviour. Before this change, on a picoXcell pc3x3: spi_master spi32766: interrupt_transfer: fifo overrun/underrun m25p80 spi32766.0: error -5 reading 9f m25p80: probe of spi32766.0 failed with error -5 After this change: m25p80 spi32766.0: m25p40 (512 Kbytes) Fixes:dd11444327("spi: dw-spi: Convert 16bit accesses to 32bit accesses") Signed-off-by: Michael van der Westhuizen <michael@smart-africa.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
149 lines
3.2 KiB
C
149 lines
3.2 KiB
C
/*
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* Memory-mapped interface driver for DW SPI Core
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*
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* Copyright (c) 2010, Octasic semiconductor.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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#include <linux/scatterlist.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <linux/of_platform.h>
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#include "spi-dw.h"
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#define DRIVER_NAME "dw_spi_mmio"
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struct dw_spi_mmio {
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struct dw_spi dws;
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struct clk *clk;
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};
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static int dw_spi_mmio_probe(struct platform_device *pdev)
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{
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struct dw_spi_mmio *dwsmmio;
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struct dw_spi *dws;
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struct resource *mem;
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int ret;
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int num_cs;
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dwsmmio = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_mmio),
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GFP_KERNEL);
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if (!dwsmmio)
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return -ENOMEM;
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dws = &dwsmmio->dws;
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/* Get basic io resource and map it */
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem) {
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dev_err(&pdev->dev, "no mem resource?\n");
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return -EINVAL;
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}
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dws->regs = devm_ioremap_resource(&pdev->dev, mem);
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if (IS_ERR(dws->regs)) {
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dev_err(&pdev->dev, "SPI region map failed\n");
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return PTR_ERR(dws->regs);
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}
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dws->irq = platform_get_irq(pdev, 0);
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if (dws->irq < 0) {
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dev_err(&pdev->dev, "no irq resource?\n");
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return dws->irq; /* -ENXIO */
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}
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dwsmmio->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(dwsmmio->clk))
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return PTR_ERR(dwsmmio->clk);
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ret = clk_prepare_enable(dwsmmio->clk);
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if (ret)
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return ret;
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dws->bus_num = pdev->id;
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dws->max_freq = clk_get_rate(dwsmmio->clk);
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of_property_read_u32(pdev->dev.of_node, "reg-io-width",
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&dws->reg_io_width);
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num_cs = 4;
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if (pdev->dev.of_node)
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of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);
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dws->num_cs = num_cs;
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if (pdev->dev.of_node) {
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int i;
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for (i = 0; i < dws->num_cs; i++) {
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int cs_gpio = of_get_named_gpio(pdev->dev.of_node,
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"cs-gpios", i);
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if (cs_gpio == -EPROBE_DEFER) {
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ret = cs_gpio;
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goto out;
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}
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if (gpio_is_valid(cs_gpio)) {
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ret = devm_gpio_request(&pdev->dev, cs_gpio,
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dev_name(&pdev->dev));
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if (ret)
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goto out;
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}
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}
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}
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ret = dw_spi_add_host(&pdev->dev, dws);
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if (ret)
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goto out;
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platform_set_drvdata(pdev, dwsmmio);
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return 0;
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out:
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clk_disable_unprepare(dwsmmio->clk);
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return ret;
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}
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static int dw_spi_mmio_remove(struct platform_device *pdev)
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{
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struct dw_spi_mmio *dwsmmio = platform_get_drvdata(pdev);
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clk_disable_unprepare(dwsmmio->clk);
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dw_spi_remove_host(&dwsmmio->dws);
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return 0;
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}
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static const struct of_device_id dw_spi_mmio_of_match[] = {
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{ .compatible = "snps,dw-apb-ssi", },
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{ /* end of table */}
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};
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MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match);
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static struct platform_driver dw_spi_mmio_driver = {
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.probe = dw_spi_mmio_probe,
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.remove = dw_spi_mmio_remove,
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.driver = {
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.name = DRIVER_NAME,
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.of_match_table = dw_spi_mmio_of_match,
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},
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};
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module_platform_driver(dw_spi_mmio_driver);
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MODULE_AUTHOR("Jean-Hugues Deschenes <jean-hugues.deschenes@octasic.com>");
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MODULE_DESCRIPTION("Memory-mapped I/O interface driver for DW SPI Core");
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MODULE_LICENSE("GPL v2");
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