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percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
629 lines
16 KiB
C
629 lines
16 KiB
C
/*
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* DMA Engine test module
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*
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* Copyright (C) 2007 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/delay.h>
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#include <linux/dmaengine.h>
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#include <linux/init.h>
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#include <linux/kthread.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/random.h>
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#include <linux/slab.h>
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#include <linux/wait.h>
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static unsigned int test_buf_size = 16384;
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module_param(test_buf_size, uint, S_IRUGO);
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MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
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static char test_channel[20];
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module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
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MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
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static char test_device[20];
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module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
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MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
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static unsigned int threads_per_chan = 1;
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module_param(threads_per_chan, uint, S_IRUGO);
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MODULE_PARM_DESC(threads_per_chan,
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"Number of threads to start per channel (default: 1)");
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static unsigned int max_channels;
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module_param(max_channels, uint, S_IRUGO);
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MODULE_PARM_DESC(max_channels,
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"Maximum number of channels to use (default: all)");
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static unsigned int iterations;
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module_param(iterations, uint, S_IRUGO);
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MODULE_PARM_DESC(iterations,
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"Iterations before stopping test (default: infinite)");
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static unsigned int xor_sources = 3;
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module_param(xor_sources, uint, S_IRUGO);
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MODULE_PARM_DESC(xor_sources,
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"Number of xor source buffers (default: 3)");
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static unsigned int pq_sources = 3;
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module_param(pq_sources, uint, S_IRUGO);
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MODULE_PARM_DESC(pq_sources,
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"Number of p+q source buffers (default: 3)");
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/*
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* Initialization patterns. All bytes in the source buffer has bit 7
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* set, all bytes in the destination buffer has bit 7 cleared.
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*
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* Bit 6 is set for all bytes which are to be copied by the DMA
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* engine. Bit 5 is set for all bytes which are to be overwritten by
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* the DMA engine.
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*
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* The remaining bits are the inverse of a counter which increments by
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* one for each byte address.
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*/
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#define PATTERN_SRC 0x80
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#define PATTERN_DST 0x00
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#define PATTERN_COPY 0x40
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#define PATTERN_OVERWRITE 0x20
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#define PATTERN_COUNT_MASK 0x1f
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struct dmatest_thread {
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struct list_head node;
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struct task_struct *task;
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struct dma_chan *chan;
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u8 **srcs;
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u8 **dsts;
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enum dma_transaction_type type;
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};
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struct dmatest_chan {
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struct list_head node;
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struct dma_chan *chan;
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struct list_head threads;
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};
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/*
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* These are protected by dma_list_mutex since they're only used by
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* the DMA filter function callback
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*/
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static LIST_HEAD(dmatest_channels);
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static unsigned int nr_channels;
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static bool dmatest_match_channel(struct dma_chan *chan)
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{
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if (test_channel[0] == '\0')
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return true;
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return strcmp(dma_chan_name(chan), test_channel) == 0;
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}
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static bool dmatest_match_device(struct dma_device *device)
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{
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if (test_device[0] == '\0')
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return true;
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return strcmp(dev_name(device->dev), test_device) == 0;
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}
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static unsigned long dmatest_random(void)
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{
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unsigned long buf;
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get_random_bytes(&buf, sizeof(buf));
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return buf;
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}
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static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
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{
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unsigned int i;
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u8 *buf;
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for (; (buf = *bufs); bufs++) {
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for (i = 0; i < start; i++)
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buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
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for ( ; i < start + len; i++)
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buf[i] = PATTERN_SRC | PATTERN_COPY
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| (~i & PATTERN_COUNT_MASK);
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for ( ; i < test_buf_size; i++)
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buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
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buf++;
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}
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}
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static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
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{
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unsigned int i;
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u8 *buf;
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for (; (buf = *bufs); bufs++) {
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for (i = 0; i < start; i++)
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buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
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for ( ; i < start + len; i++)
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buf[i] = PATTERN_DST | PATTERN_OVERWRITE
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| (~i & PATTERN_COUNT_MASK);
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for ( ; i < test_buf_size; i++)
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buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
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}
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}
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static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
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unsigned int counter, bool is_srcbuf)
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{
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u8 diff = actual ^ pattern;
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u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
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const char *thread_name = current->comm;
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if (is_srcbuf)
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pr_warning("%s: srcbuf[0x%x] overwritten!"
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" Expected %02x, got %02x\n",
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thread_name, index, expected, actual);
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else if ((pattern & PATTERN_COPY)
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&& (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
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pr_warning("%s: dstbuf[0x%x] not copied!"
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" Expected %02x, got %02x\n",
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thread_name, index, expected, actual);
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else if (diff & PATTERN_SRC)
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pr_warning("%s: dstbuf[0x%x] was copied!"
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" Expected %02x, got %02x\n",
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thread_name, index, expected, actual);
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else
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pr_warning("%s: dstbuf[0x%x] mismatch!"
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" Expected %02x, got %02x\n",
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thread_name, index, expected, actual);
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}
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static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
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unsigned int end, unsigned int counter, u8 pattern,
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bool is_srcbuf)
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{
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unsigned int i;
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unsigned int error_count = 0;
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u8 actual;
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u8 expected;
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u8 *buf;
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unsigned int counter_orig = counter;
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for (; (buf = *bufs); bufs++) {
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counter = counter_orig;
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for (i = start; i < end; i++) {
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actual = buf[i];
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expected = pattern | (~counter & PATTERN_COUNT_MASK);
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if (actual != expected) {
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if (error_count < 32)
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dmatest_mismatch(actual, pattern, i,
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counter, is_srcbuf);
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error_count++;
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}
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counter++;
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}
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}
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if (error_count > 32)
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pr_warning("%s: %u errors suppressed\n",
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current->comm, error_count - 32);
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return error_count;
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}
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static void dmatest_callback(void *completion)
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{
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complete(completion);
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}
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/*
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* This function repeatedly tests DMA transfers of various lengths and
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* offsets for a given operation type until it is told to exit by
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* kthread_stop(). There may be multiple threads running this function
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* in parallel for a single channel, and there may be multiple channels
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* being tested in parallel.
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*
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* Before each test, the source and destination buffer is initialized
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* with a known pattern. This pattern is different depending on
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* whether it's in an area which is supposed to be copied or
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* overwritten, and different in the source and destination buffers.
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* So if the DMA engine doesn't copy exactly what we tell it to copy,
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* we'll notice.
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*/
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static int dmatest_func(void *data)
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{
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struct dmatest_thread *thread = data;
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struct dma_chan *chan;
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const char *thread_name;
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unsigned int src_off, dst_off, len;
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unsigned int error_count;
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unsigned int failed_tests = 0;
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unsigned int total_tests = 0;
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dma_cookie_t cookie;
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enum dma_status status;
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enum dma_ctrl_flags flags;
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u8 pq_coefs[pq_sources + 1];
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int ret;
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int src_cnt;
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int dst_cnt;
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int i;
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thread_name = current->comm;
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ret = -ENOMEM;
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smp_rmb();
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chan = thread->chan;
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if (thread->type == DMA_MEMCPY)
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src_cnt = dst_cnt = 1;
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else if (thread->type == DMA_XOR) {
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src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
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dst_cnt = 1;
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} else if (thread->type == DMA_PQ) {
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src_cnt = pq_sources | 1; /* force odd to ensure dst = src */
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dst_cnt = 2;
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for (i = 0; i < src_cnt; i++)
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pq_coefs[i] = 1;
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} else
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goto err_srcs;
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thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
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if (!thread->srcs)
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goto err_srcs;
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for (i = 0; i < src_cnt; i++) {
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thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
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if (!thread->srcs[i])
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goto err_srcbuf;
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}
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thread->srcs[i] = NULL;
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thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
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if (!thread->dsts)
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goto err_dsts;
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for (i = 0; i < dst_cnt; i++) {
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thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
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if (!thread->dsts[i])
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goto err_dstbuf;
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}
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thread->dsts[i] = NULL;
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set_user_nice(current, 10);
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flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
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while (!kthread_should_stop()
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&& !(iterations && total_tests >= iterations)) {
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struct dma_device *dev = chan->device;
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struct dma_async_tx_descriptor *tx = NULL;
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dma_addr_t dma_srcs[src_cnt];
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dma_addr_t dma_dsts[dst_cnt];
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struct completion cmp;
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unsigned long tmo = msecs_to_jiffies(3000);
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u8 align = 0;
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total_tests++;
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/* honor alignment restrictions */
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if (thread->type == DMA_MEMCPY)
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align = dev->copy_align;
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else if (thread->type == DMA_XOR)
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align = dev->xor_align;
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else if (thread->type == DMA_PQ)
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align = dev->pq_align;
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if (1 << align > test_buf_size) {
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pr_err("%u-byte buffer too small for %d-byte alignment\n",
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test_buf_size, 1 << align);
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break;
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}
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len = dmatest_random() % test_buf_size + 1;
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len = (len >> align) << align;
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if (!len)
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len = 1 << align;
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src_off = dmatest_random() % (test_buf_size - len + 1);
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dst_off = dmatest_random() % (test_buf_size - len + 1);
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src_off = (src_off >> align) << align;
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dst_off = (dst_off >> align) << align;
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dmatest_init_srcs(thread->srcs, src_off, len);
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dmatest_init_dsts(thread->dsts, dst_off, len);
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for (i = 0; i < src_cnt; i++) {
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u8 *buf = thread->srcs[i] + src_off;
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dma_srcs[i] = dma_map_single(dev->dev, buf, len,
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DMA_TO_DEVICE);
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}
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/* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
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for (i = 0; i < dst_cnt; i++) {
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dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
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test_buf_size,
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DMA_BIDIRECTIONAL);
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}
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if (thread->type == DMA_MEMCPY)
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tx = dev->device_prep_dma_memcpy(chan,
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dma_dsts[0] + dst_off,
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dma_srcs[0], len,
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flags);
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else if (thread->type == DMA_XOR)
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tx = dev->device_prep_dma_xor(chan,
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dma_dsts[0] + dst_off,
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dma_srcs, src_cnt,
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len, flags);
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else if (thread->type == DMA_PQ) {
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dma_addr_t dma_pq[dst_cnt];
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for (i = 0; i < dst_cnt; i++)
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dma_pq[i] = dma_dsts[i] + dst_off;
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tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
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src_cnt, pq_coefs,
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len, flags);
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}
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if (!tx) {
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for (i = 0; i < src_cnt; i++)
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dma_unmap_single(dev->dev, dma_srcs[i], len,
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DMA_TO_DEVICE);
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for (i = 0; i < dst_cnt; i++)
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dma_unmap_single(dev->dev, dma_dsts[i],
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test_buf_size,
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DMA_BIDIRECTIONAL);
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pr_warning("%s: #%u: prep error with src_off=0x%x "
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"dst_off=0x%x len=0x%x\n",
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thread_name, total_tests - 1,
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src_off, dst_off, len);
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msleep(100);
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failed_tests++;
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continue;
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}
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init_completion(&cmp);
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tx->callback = dmatest_callback;
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tx->callback_param = &cmp;
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cookie = tx->tx_submit(tx);
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if (dma_submit_error(cookie)) {
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pr_warning("%s: #%u: submit error %d with src_off=0x%x "
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"dst_off=0x%x len=0x%x\n",
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thread_name, total_tests - 1, cookie,
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src_off, dst_off, len);
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msleep(100);
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failed_tests++;
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continue;
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}
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dma_async_issue_pending(chan);
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tmo = wait_for_completion_timeout(&cmp, tmo);
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status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
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if (tmo == 0) {
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pr_warning("%s: #%u: test timed out\n",
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thread_name, total_tests - 1);
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failed_tests++;
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continue;
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} else if (status != DMA_SUCCESS) {
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pr_warning("%s: #%u: got completion callback,"
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" but status is \'%s\'\n",
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thread_name, total_tests - 1,
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status == DMA_ERROR ? "error" : "in progress");
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failed_tests++;
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continue;
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}
|
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|
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/* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
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for (i = 0; i < dst_cnt; i++)
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dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
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DMA_BIDIRECTIONAL);
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error_count = 0;
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|
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pr_debug("%s: verifying source buffer...\n", thread_name);
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error_count += dmatest_verify(thread->srcs, 0, src_off,
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0, PATTERN_SRC, true);
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error_count += dmatest_verify(thread->srcs, src_off,
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src_off + len, src_off,
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PATTERN_SRC | PATTERN_COPY, true);
|
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error_count += dmatest_verify(thread->srcs, src_off + len,
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test_buf_size, src_off + len,
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PATTERN_SRC, true);
|
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|
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pr_debug("%s: verifying dest buffer...\n",
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thread->task->comm);
|
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error_count += dmatest_verify(thread->dsts, 0, dst_off,
|
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0, PATTERN_DST, false);
|
|
error_count += dmatest_verify(thread->dsts, dst_off,
|
|
dst_off + len, src_off,
|
|
PATTERN_SRC | PATTERN_COPY, false);
|
|
error_count += dmatest_verify(thread->dsts, dst_off + len,
|
|
test_buf_size, dst_off + len,
|
|
PATTERN_DST, false);
|
|
|
|
if (error_count) {
|
|
pr_warning("%s: #%u: %u errors with "
|
|
"src_off=0x%x dst_off=0x%x len=0x%x\n",
|
|
thread_name, total_tests - 1, error_count,
|
|
src_off, dst_off, len);
|
|
failed_tests++;
|
|
} else {
|
|
pr_debug("%s: #%u: No errors with "
|
|
"src_off=0x%x dst_off=0x%x len=0x%x\n",
|
|
thread_name, total_tests - 1,
|
|
src_off, dst_off, len);
|
|
}
|
|
}
|
|
|
|
ret = 0;
|
|
for (i = 0; thread->dsts[i]; i++)
|
|
kfree(thread->dsts[i]);
|
|
err_dstbuf:
|
|
kfree(thread->dsts);
|
|
err_dsts:
|
|
for (i = 0; thread->srcs[i]; i++)
|
|
kfree(thread->srcs[i]);
|
|
err_srcbuf:
|
|
kfree(thread->srcs);
|
|
err_srcs:
|
|
pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
|
|
thread_name, total_tests, failed_tests, ret);
|
|
|
|
if (iterations > 0)
|
|
while (!kthread_should_stop()) {
|
|
DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
|
|
interruptible_sleep_on(&wait_dmatest_exit);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
|
|
{
|
|
struct dmatest_thread *thread;
|
|
struct dmatest_thread *_thread;
|
|
int ret;
|
|
|
|
list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
|
|
ret = kthread_stop(thread->task);
|
|
pr_debug("dmatest: thread %s exited with status %d\n",
|
|
thread->task->comm, ret);
|
|
list_del(&thread->node);
|
|
kfree(thread);
|
|
}
|
|
kfree(dtc);
|
|
}
|
|
|
|
static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
|
|
{
|
|
struct dmatest_thread *thread;
|
|
struct dma_chan *chan = dtc->chan;
|
|
char *op;
|
|
unsigned int i;
|
|
|
|
if (type == DMA_MEMCPY)
|
|
op = "copy";
|
|
else if (type == DMA_XOR)
|
|
op = "xor";
|
|
else if (type == DMA_PQ)
|
|
op = "pq";
|
|
else
|
|
return -EINVAL;
|
|
|
|
for (i = 0; i < threads_per_chan; i++) {
|
|
thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
|
|
if (!thread) {
|
|
pr_warning("dmatest: No memory for %s-%s%u\n",
|
|
dma_chan_name(chan), op, i);
|
|
|
|
break;
|
|
}
|
|
thread->chan = dtc->chan;
|
|
thread->type = type;
|
|
smp_wmb();
|
|
thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
|
|
dma_chan_name(chan), op, i);
|
|
if (IS_ERR(thread->task)) {
|
|
pr_warning("dmatest: Failed to run thread %s-%s%u\n",
|
|
dma_chan_name(chan), op, i);
|
|
kfree(thread);
|
|
break;
|
|
}
|
|
|
|
/* srcbuf and dstbuf are allocated by the thread itself */
|
|
|
|
list_add_tail(&thread->node, &dtc->threads);
|
|
}
|
|
|
|
return i;
|
|
}
|
|
|
|
static int dmatest_add_channel(struct dma_chan *chan)
|
|
{
|
|
struct dmatest_chan *dtc;
|
|
struct dma_device *dma_dev = chan->device;
|
|
unsigned int thread_count = 0;
|
|
unsigned int cnt;
|
|
|
|
dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
|
|
if (!dtc) {
|
|
pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
|
|
return -ENOMEM;
|
|
}
|
|
|
|
dtc->chan = chan;
|
|
INIT_LIST_HEAD(&dtc->threads);
|
|
|
|
if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
|
|
cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
|
|
thread_count += cnt > 0 ? cnt : 0;
|
|
}
|
|
if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
|
|
cnt = dmatest_add_threads(dtc, DMA_XOR);
|
|
thread_count += cnt > 0 ? cnt : 0;
|
|
}
|
|
if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
|
|
cnt = dmatest_add_threads(dtc, DMA_PQ);
|
|
thread_count += cnt > 0 ?: 0;
|
|
}
|
|
|
|
pr_info("dmatest: Started %u threads using %s\n",
|
|
thread_count, dma_chan_name(chan));
|
|
|
|
list_add_tail(&dtc->node, &dmatest_channels);
|
|
nr_channels++;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static bool filter(struct dma_chan *chan, void *param)
|
|
{
|
|
if (!dmatest_match_channel(chan) || !dmatest_match_device(chan->device))
|
|
return false;
|
|
else
|
|
return true;
|
|
}
|
|
|
|
static int __init dmatest_init(void)
|
|
{
|
|
dma_cap_mask_t mask;
|
|
struct dma_chan *chan;
|
|
int err = 0;
|
|
|
|
dma_cap_zero(mask);
|
|
dma_cap_set(DMA_MEMCPY, mask);
|
|
for (;;) {
|
|
chan = dma_request_channel(mask, filter, NULL);
|
|
if (chan) {
|
|
err = dmatest_add_channel(chan);
|
|
if (err) {
|
|
dma_release_channel(chan);
|
|
break; /* add_channel failed, punt */
|
|
}
|
|
} else
|
|
break; /* no more channels available */
|
|
if (max_channels && nr_channels >= max_channels)
|
|
break; /* we have all we need */
|
|
}
|
|
|
|
return err;
|
|
}
|
|
/* when compiled-in wait for drivers to load first */
|
|
late_initcall(dmatest_init);
|
|
|
|
static void __exit dmatest_exit(void)
|
|
{
|
|
struct dmatest_chan *dtc, *_dtc;
|
|
struct dma_chan *chan;
|
|
|
|
list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
|
|
list_del(&dtc->node);
|
|
chan = dtc->chan;
|
|
dmatest_cleanup_channel(dtc);
|
|
pr_debug("dmatest: dropped channel %s\n",
|
|
dma_chan_name(chan));
|
|
dma_release_channel(chan);
|
|
}
|
|
}
|
|
module_exit(dmatest_exit);
|
|
|
|
MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
|
|
MODULE_LICENSE("GPL v2");
|