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9cb5412b07
This patch enables mesh point operation for ath9k. Tested with b43, ath9k, rt2500usb, and ath5k as peers. Signed-off-by: Pat Erley <pat-lkml@erley.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
747 lines
21 KiB
C
747 lines
21 KiB
C
/*
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* Copyright (c) 2008-2009 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "ath9k.h"
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#define FUDGE 2
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/*
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* This function will modify certain transmit queue properties depending on
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* the operating mode of the station (AP or AdHoc). Parameters are AIFS
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* settings and channel width min/max
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*/
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static int ath_beaconq_config(struct ath_softc *sc)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath9k_tx_queue_info qi;
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ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi);
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if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) {
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/* Always burst out beacon and CAB traffic. */
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qi.tqi_aifs = 1;
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qi.tqi_cwmin = 0;
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qi.tqi_cwmax = 0;
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} else {
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/* Adhoc mode; important thing is to use 2x cwmin. */
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qi.tqi_aifs = sc->beacon.beacon_qi.tqi_aifs;
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qi.tqi_cwmin = 2*sc->beacon.beacon_qi.tqi_cwmin;
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qi.tqi_cwmax = sc->beacon.beacon_qi.tqi_cwmax;
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}
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if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
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DPRINTF(sc, ATH_DBG_FATAL,
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"unable to update h/w beacon queue parameters\n");
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return 0;
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} else {
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ath9k_hw_resettxqueue(ah, sc->beacon.beaconq);
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return 1;
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}
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}
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/*
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* Associates the beacon frame buffer with a transmit descriptor. Will set
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* up all required antenna switch parameters, rate codes, and channel flags.
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* Beacons are always sent out at the lowest rate, and are not retried.
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*/
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static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp,
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struct ath_buf *bf)
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{
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struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
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struct ath_hw *ah = sc->sc_ah;
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struct ath_desc *ds;
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struct ath9k_11n_rate_series series[4];
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struct ath_rate_table *rt;
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int flags, antenna, ctsrate = 0, ctsduration = 0;
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u8 rate;
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ds = bf->bf_desc;
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flags = ATH9K_TXDESC_NOACK;
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if (((sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
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(sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) &&
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(ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
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ds->ds_link = bf->bf_daddr; /* self-linked */
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flags |= ATH9K_TXDESC_VEOL;
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/* Let hardware handle antenna switching. */
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antenna = 0;
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} else {
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ds->ds_link = 0;
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/*
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* Switch antenna every beacon.
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* Should only switch every beacon period, not for every SWBA
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* XXX assumes two antennae
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*/
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antenna = ((sc->beacon.ast_be_xmit / sc->nbcnvifs) & 1 ? 2 : 1);
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}
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ds->ds_data = bf->bf_buf_addr;
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rt = sc->cur_rate_table;
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rate = rt->info[0].ratecode;
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if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
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rate |= rt->info[0].short_preamble;
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ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN,
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ATH9K_PKT_TYPE_BEACON,
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MAX_RATE_POWER,
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ATH9K_TXKEYIX_INVALID,
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ATH9K_KEY_TYPE_CLEAR,
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flags);
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/* NB: beacon's BufLen must be a multiple of 4 bytes */
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ath9k_hw_filltxdesc(ah, ds, roundup(skb->len, 4),
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true, true, ds);
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memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
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series[0].Tries = 1;
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series[0].Rate = rate;
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series[0].ChSel = sc->tx_chainmask;
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series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
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ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration,
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series, 4, 0);
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}
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static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif)
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{
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struct ath_wiphy *aphy = hw->priv;
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struct ath_softc *sc = aphy->sc;
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struct ath_buf *bf;
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struct ath_vif *avp;
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struct sk_buff *skb;
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struct ath_txq *cabq;
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struct ieee80211_tx_info *info;
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int cabq_depth;
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if (aphy->state != ATH_WIPHY_ACTIVE)
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return NULL;
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avp = (void *)vif->drv_priv;
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cabq = sc->beacon.cabq;
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if (avp->av_bcbuf == NULL) {
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DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
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avp, avp->av_bcbuf);
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return NULL;
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}
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/* Release the old beacon first */
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bf = avp->av_bcbuf;
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skb = (struct sk_buff *)bf->bf_mpdu;
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if (skb) {
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dma_unmap_single(sc->dev, bf->bf_dmacontext,
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skb->len, DMA_TO_DEVICE);
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dev_kfree_skb_any(skb);
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}
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/* Get a new beacon from mac80211 */
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skb = ieee80211_beacon_get(hw, vif);
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bf->bf_mpdu = skb;
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if (skb == NULL)
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return NULL;
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((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
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avp->tsf_adjust;
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info = IEEE80211_SKB_CB(skb);
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if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
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/*
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* TODO: make sure the seq# gets assigned properly (vs. other
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* TX frames)
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*/
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
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sc->tx.seq_no += 0x10;
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hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
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hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
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}
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bf->bf_buf_addr = bf->bf_dmacontext =
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dma_map_single(sc->dev, skb->data,
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skb->len, DMA_TO_DEVICE);
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if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
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dev_kfree_skb_any(skb);
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bf->bf_mpdu = NULL;
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DPRINTF(sc, ATH_DBG_FATAL, "dma_mapping_error on beaconing\n");
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return NULL;
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}
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skb = ieee80211_get_buffered_bc(hw, vif);
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/*
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* if the CABQ traffic from previous DTIM is pending and the current
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* beacon is also a DTIM.
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* 1) if there is only one vif let the cab traffic continue.
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* 2) if there are more than one vif and we are using staggered
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* beacons, then drain the cabq by dropping all the frames in
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* the cabq so that the current vifs cab traffic can be scheduled.
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*/
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spin_lock_bh(&cabq->axq_lock);
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cabq_depth = cabq->axq_depth;
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spin_unlock_bh(&cabq->axq_lock);
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if (skb && cabq_depth) {
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if (sc->nvifs > 1) {
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DPRINTF(sc, ATH_DBG_BEACON,
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"Flushing previous cabq traffic\n");
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ath_draintxq(sc, cabq, false);
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}
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}
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ath_beacon_setup(sc, avp, bf);
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while (skb) {
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ath_tx_cabq(hw, skb);
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skb = ieee80211_get_buffered_bc(hw, vif);
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}
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return bf;
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}
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/*
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* Startup beacon transmission for adhoc mode when they are sent entirely
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* by the hardware using the self-linked descriptor + veol trick.
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*/
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static void ath_beacon_start_adhoc(struct ath_softc *sc,
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struct ieee80211_vif *vif)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_buf *bf;
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struct ath_vif *avp;
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struct sk_buff *skb;
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avp = (void *)vif->drv_priv;
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if (avp->av_bcbuf == NULL)
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return;
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bf = avp->av_bcbuf;
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skb = (struct sk_buff *) bf->bf_mpdu;
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ath_beacon_setup(sc, avp, bf);
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/* NB: caller is known to have already stopped tx dma */
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ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
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ath9k_hw_txstart(ah, sc->beacon.beaconq);
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DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
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sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc);
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}
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int ath_beaconq_setup(struct ath_hw *ah)
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{
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struct ath9k_tx_queue_info qi;
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memset(&qi, 0, sizeof(qi));
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qi.tqi_aifs = 1;
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qi.tqi_cwmin = 0;
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qi.tqi_cwmax = 0;
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/* NB: don't enable any interrupts */
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return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
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}
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int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
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{
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struct ath_softc *sc = aphy->sc;
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struct ath_vif *avp;
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struct ath_buf *bf;
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struct sk_buff *skb;
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__le64 tstamp;
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avp = (void *)vif->drv_priv;
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/* Allocate a beacon descriptor if we haven't done so. */
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if (!avp->av_bcbuf) {
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/* Allocate beacon state for hostap/ibss. We know
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* a buffer is available. */
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avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf,
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struct ath_buf, list);
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list_del(&avp->av_bcbuf->list);
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if (sc->sc_ah->opmode == NL80211_IFTYPE_AP ||
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!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
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int slot;
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/*
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* Assign the vif to a beacon xmit slot. As
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* above, this cannot fail to find one.
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*/
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avp->av_bslot = 0;
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for (slot = 0; slot < ATH_BCBUF; slot++)
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if (sc->beacon.bslot[slot] == NULL) {
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/*
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* XXX hack, space out slots to better
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* deal with misses
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*/
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if (slot+1 < ATH_BCBUF &&
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sc->beacon.bslot[slot+1] == NULL) {
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avp->av_bslot = slot+1;
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break;
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}
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avp->av_bslot = slot;
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/* NB: keep looking for a double slot */
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}
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BUG_ON(sc->beacon.bslot[avp->av_bslot] != NULL);
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sc->beacon.bslot[avp->av_bslot] = vif;
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sc->beacon.bslot_aphy[avp->av_bslot] = aphy;
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sc->nbcnvifs++;
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}
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}
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/* release the previous beacon frame, if it already exists. */
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bf = avp->av_bcbuf;
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if (bf->bf_mpdu != NULL) {
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skb = (struct sk_buff *)bf->bf_mpdu;
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dma_unmap_single(sc->dev, bf->bf_dmacontext,
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skb->len, DMA_TO_DEVICE);
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dev_kfree_skb_any(skb);
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bf->bf_mpdu = NULL;
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}
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/* NB: the beacon data buffer must be 32-bit aligned. */
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skb = ieee80211_beacon_get(sc->hw, vif);
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if (skb == NULL) {
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DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n");
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return -ENOMEM;
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}
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tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
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sc->beacon.bc_tstamp = le64_to_cpu(tstamp);
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/* Calculate a TSF adjustment factor required for staggered beacons. */
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if (avp->av_bslot > 0) {
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u64 tsfadjust;
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int intval;
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intval = sc->hw->conf.beacon_int ?
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sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
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/*
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* Calculate the TSF offset for this beacon slot, i.e., the
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* number of usecs that need to be added to the timestamp field
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* in Beacon and Probe Response frames. Beacon slot 0 is
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* processed at the correct offset, so it does not require TSF
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* adjustment. Other slots are adjusted to get the timestamp
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* close to the TBTT for the BSS.
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*/
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tsfadjust = intval * avp->av_bslot / ATH_BCBUF;
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avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust));
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DPRINTF(sc, ATH_DBG_BEACON,
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"stagger beacons, bslot %d intval %u tsfadjust %llu\n",
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avp->av_bslot, intval, (unsigned long long)tsfadjust);
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((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
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avp->tsf_adjust;
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} else
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avp->tsf_adjust = cpu_to_le64(0);
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bf->bf_mpdu = skb;
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bf->bf_buf_addr = bf->bf_dmacontext =
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dma_map_single(sc->dev, skb->data,
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skb->len, DMA_TO_DEVICE);
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if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
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dev_kfree_skb_any(skb);
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bf->bf_mpdu = NULL;
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DPRINTF(sc, ATH_DBG_FATAL,
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"dma_mapping_error on beacon alloc\n");
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return -ENOMEM;
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}
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return 0;
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}
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void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp)
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{
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if (avp->av_bcbuf != NULL) {
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struct ath_buf *bf;
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if (avp->av_bslot != -1) {
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sc->beacon.bslot[avp->av_bslot] = NULL;
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sc->beacon.bslot_aphy[avp->av_bslot] = NULL;
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sc->nbcnvifs--;
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}
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bf = avp->av_bcbuf;
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if (bf->bf_mpdu != NULL) {
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struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
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dma_unmap_single(sc->dev, bf->bf_dmacontext,
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skb->len, DMA_TO_DEVICE);
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dev_kfree_skb_any(skb);
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bf->bf_mpdu = NULL;
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}
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list_add_tail(&bf->list, &sc->beacon.bbuf);
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avp->av_bcbuf = NULL;
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}
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}
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void ath_beacon_tasklet(unsigned long data)
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{
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struct ath_softc *sc = (struct ath_softc *)data;
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struct ath_hw *ah = sc->sc_ah;
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struct ath_buf *bf = NULL;
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struct ieee80211_vif *vif;
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struct ath_wiphy *aphy;
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int slot;
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u32 bfaddr, bc = 0, tsftu;
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u64 tsf;
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u16 intval;
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/*
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* Check if the previous beacon has gone out. If
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* not don't try to post another, skip this period
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* and wait for the next. Missed beacons indicate
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* a problem and should not occur. If we miss too
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* many consecutive beacons reset the device.
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*/
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if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0) {
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sc->beacon.bmisscnt++;
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if (sc->beacon.bmisscnt < BSTUCK_THRESH) {
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DPRINTF(sc, ATH_DBG_BEACON,
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"missed %u consecutive beacons\n",
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sc->beacon.bmisscnt);
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} else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
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DPRINTF(sc, ATH_DBG_BEACON,
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"beacon is officially stuck\n");
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ath_reset(sc, false);
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}
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return;
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}
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if (sc->beacon.bmisscnt != 0) {
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DPRINTF(sc, ATH_DBG_BEACON,
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"resume beacon xmit after %u misses\n",
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sc->beacon.bmisscnt);
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sc->beacon.bmisscnt = 0;
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}
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/*
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* Generate beacon frames. we are sending frames
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* staggered so calculate the slot for this frame based
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* on the tsf to safeguard against missing an swba.
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*/
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intval = sc->hw->conf.beacon_int ?
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sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
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tsf = ath9k_hw_gettsf64(ah);
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tsftu = TSF_TO_TU(tsf>>32, tsf);
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slot = ((tsftu % intval) * ATH_BCBUF) / intval;
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/*
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* Reverse the slot order to get slot 0 on the TBTT offset that does
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* not require TSF adjustment and other slots adding
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* slot/ATH_BCBUF * beacon_int to timestamp. For example, with
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* ATH_BCBUF = 4, we process beacon slots as follows: 3 2 1 0 3 2 1 ..
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* and slot 0 is at correct offset to TBTT.
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*/
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slot = ATH_BCBUF - slot - 1;
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vif = sc->beacon.bslot[slot];
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aphy = sc->beacon.bslot_aphy[slot];
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DPRINTF(sc, ATH_DBG_BEACON,
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"slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
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slot, tsf, tsftu, intval, vif);
|
|
|
|
bfaddr = 0;
|
|
if (vif) {
|
|
bf = ath_beacon_generate(aphy->hw, vif);
|
|
if (bf != NULL) {
|
|
bfaddr = bf->bf_daddr;
|
|
bc = 1;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Handle slot time change when a non-ERP station joins/leaves
|
|
* an 11g network. The 802.11 layer notifies us via callback,
|
|
* we mark updateslot, then wait one beacon before effecting
|
|
* the change. This gives associated stations at least one
|
|
* beacon interval to note the state change.
|
|
*
|
|
* NB: The slot time change state machine is clocked according
|
|
* to whether we are bursting or staggering beacons. We
|
|
* recognize the request to update and record the current
|
|
* slot then don't transition until that slot is reached
|
|
* again. If we miss a beacon for that slot then we'll be
|
|
* slow to transition but we'll be sure at least one beacon
|
|
* interval has passed. When bursting slot is always left
|
|
* set to ATH_BCBUF so this check is a noop.
|
|
*/
|
|
if (sc->beacon.updateslot == UPDATE) {
|
|
sc->beacon.updateslot = COMMIT; /* commit next beacon */
|
|
sc->beacon.slotupdate = slot;
|
|
} else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
|
|
ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime);
|
|
sc->beacon.updateslot = OK;
|
|
}
|
|
if (bfaddr != 0) {
|
|
/*
|
|
* Stop any current dma and put the new frame(s) on the queue.
|
|
* This should never fail since we check above that no frames
|
|
* are still pending on the queue.
|
|
*/
|
|
if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) {
|
|
DPRINTF(sc, ATH_DBG_FATAL,
|
|
"beacon queue %u did not stop?\n", sc->beacon.beaconq);
|
|
}
|
|
|
|
/* NB: cabq traffic should already be queued and primed */
|
|
ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
|
|
ath9k_hw_txstart(ah, sc->beacon.beaconq);
|
|
|
|
sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */
|
|
}
|
|
}
|
|
|
|
/*
|
|
* For multi-bss ap support beacons are either staggered evenly over N slots or
|
|
* burst together. For the former arrange for the SWBA to be delivered for each
|
|
* slot. Slots that are not occupied will generate nothing.
|
|
*/
|
|
static void ath_beacon_config_ap(struct ath_softc *sc,
|
|
struct ath_beacon_config *conf,
|
|
struct ath_vif *avp)
|
|
{
|
|
u32 nexttbtt, intval;
|
|
|
|
/* Configure the timers only when the TSF has to be reset */
|
|
|
|
if (!(sc->sc_flags & SC_OP_TSF_RESET))
|
|
return;
|
|
|
|
/* NB: the beacon interval is kept internally in TU's */
|
|
intval = conf->beacon_interval & ATH9K_BEACON_PERIOD;
|
|
intval /= ATH_BCBUF; /* for staggered beacons */
|
|
nexttbtt = intval;
|
|
intval |= ATH9K_BEACON_RESET_TSF;
|
|
|
|
/*
|
|
* In AP mode we enable the beacon timers and SWBA interrupts to
|
|
* prepare beacon frames.
|
|
*/
|
|
intval |= ATH9K_BEACON_ENA;
|
|
sc->imask |= ATH9K_INT_SWBA;
|
|
ath_beaconq_config(sc);
|
|
|
|
/* Set the computed AP beacon timers */
|
|
|
|
ath9k_hw_set_interrupts(sc->sc_ah, 0);
|
|
ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval);
|
|
sc->beacon.bmisscnt = 0;
|
|
ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
|
|
|
|
/* Clear the reset TSF flag, so that subsequent beacon updation
|
|
will not reset the HW TSF. */
|
|
|
|
sc->sc_flags &= ~SC_OP_TSF_RESET;
|
|
}
|
|
|
|
/*
|
|
* This sets up the beacon timers according to the timestamp of the last
|
|
* received beacon and the current TSF, configures PCF and DTIM
|
|
* handling, programs the sleep registers so the hardware will wakeup in
|
|
* time to receive beacons, and configures the beacon miss handling so
|
|
* we'll receive a BMISS interrupt when we stop seeing beacons from the AP
|
|
* we've associated with.
|
|
*/
|
|
static void ath_beacon_config_sta(struct ath_softc *sc,
|
|
struct ath_beacon_config *conf,
|
|
struct ath_vif *avp)
|
|
{
|
|
struct ath9k_beacon_state bs;
|
|
int dtimperiod, dtimcount, sleepduration;
|
|
int cfpperiod, cfpcount;
|
|
u32 nexttbtt = 0, intval, tsftu;
|
|
u64 tsf;
|
|
|
|
memset(&bs, 0, sizeof(bs));
|
|
intval = conf->beacon_interval & ATH9K_BEACON_PERIOD;
|
|
|
|
/*
|
|
* Setup dtim and cfp parameters according to
|
|
* last beacon we received (which may be none).
|
|
*/
|
|
dtimperiod = conf->dtim_period;
|
|
if (dtimperiod <= 0) /* NB: 0 if not known */
|
|
dtimperiod = 1;
|
|
dtimcount = conf->dtim_count;
|
|
if (dtimcount >= dtimperiod) /* NB: sanity check */
|
|
dtimcount = 0;
|
|
cfpperiod = 1; /* NB: no PCF support yet */
|
|
cfpcount = 0;
|
|
|
|
sleepduration = conf->listen_interval * intval;
|
|
if (sleepduration <= 0)
|
|
sleepduration = intval;
|
|
|
|
/*
|
|
* Pull nexttbtt forward to reflect the current
|
|
* TSF and calculate dtim+cfp state for the result.
|
|
*/
|
|
tsf = ath9k_hw_gettsf64(sc->sc_ah);
|
|
tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
|
|
do {
|
|
nexttbtt += intval;
|
|
if (--dtimcount < 0) {
|
|
dtimcount = dtimperiod - 1;
|
|
if (--cfpcount < 0)
|
|
cfpcount = cfpperiod - 1;
|
|
}
|
|
} while (nexttbtt < tsftu);
|
|
|
|
bs.bs_intval = intval;
|
|
bs.bs_nexttbtt = nexttbtt;
|
|
bs.bs_dtimperiod = dtimperiod*intval;
|
|
bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
|
|
bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
|
|
bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
|
|
bs.bs_cfpmaxduration = 0;
|
|
|
|
/*
|
|
* Calculate the number of consecutive beacons to miss* before taking
|
|
* a BMISS interrupt. The configuration is specified in TU so we only
|
|
* need calculate based on the beacon interval. Note that we clamp the
|
|
* result to at most 15 beacons.
|
|
*/
|
|
if (sleepduration > intval) {
|
|
bs.bs_bmissthreshold = conf->listen_interval *
|
|
ATH_DEFAULT_BMISS_LIMIT / 2;
|
|
} else {
|
|
bs.bs_bmissthreshold = DIV_ROUND_UP(conf->bmiss_timeout, intval);
|
|
if (bs.bs_bmissthreshold > 15)
|
|
bs.bs_bmissthreshold = 15;
|
|
else if (bs.bs_bmissthreshold <= 0)
|
|
bs.bs_bmissthreshold = 1;
|
|
}
|
|
|
|
/*
|
|
* Calculate sleep duration. The configuration is given in ms.
|
|
* We ensure a multiple of the beacon period is used. Also, if the sleep
|
|
* duration is greater than the DTIM period then it makes senses
|
|
* to make it a multiple of that.
|
|
*
|
|
* XXX fixed at 100ms
|
|
*/
|
|
|
|
bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100), sleepduration);
|
|
if (bs.bs_sleepduration > bs.bs_dtimperiod)
|
|
bs.bs_sleepduration = bs.bs_dtimperiod;
|
|
|
|
/* TSF out of range threshold fixed at 1 second */
|
|
bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;
|
|
|
|
DPRINTF(sc, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu);
|
|
DPRINTF(sc, ATH_DBG_BEACON,
|
|
"bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n",
|
|
bs.bs_bmissthreshold, bs.bs_sleepduration,
|
|
bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext);
|
|
|
|
/* Set the computed STA beacon timers */
|
|
|
|
ath9k_hw_set_interrupts(sc->sc_ah, 0);
|
|
ath9k_hw_set_sta_beacon_timers(sc->sc_ah, &bs);
|
|
sc->imask |= ATH9K_INT_BMISS;
|
|
ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
|
|
}
|
|
|
|
static void ath_beacon_config_adhoc(struct ath_softc *sc,
|
|
struct ath_beacon_config *conf,
|
|
struct ath_vif *avp,
|
|
struct ieee80211_vif *vif)
|
|
{
|
|
u64 tsf;
|
|
u32 tsftu, intval, nexttbtt;
|
|
|
|
intval = conf->beacon_interval & ATH9K_BEACON_PERIOD;
|
|
|
|
/* Pull nexttbtt forward to reflect the current TSF */
|
|
|
|
nexttbtt = TSF_TO_TU(sc->beacon.bc_tstamp >> 32, sc->beacon.bc_tstamp);
|
|
if (nexttbtt == 0)
|
|
nexttbtt = intval;
|
|
else if (intval)
|
|
nexttbtt = roundup(nexttbtt, intval);
|
|
|
|
tsf = ath9k_hw_gettsf64(sc->sc_ah);
|
|
tsftu = TSF_TO_TU((u32)(tsf>>32), (u32)tsf) + FUDGE;
|
|
do {
|
|
nexttbtt += intval;
|
|
} while (nexttbtt < tsftu);
|
|
|
|
DPRINTF(sc, ATH_DBG_BEACON,
|
|
"IBSS nexttbtt %u intval %u (%u)\n",
|
|
nexttbtt, intval, conf->beacon_interval);
|
|
|
|
/*
|
|
* In IBSS mode enable the beacon timers but only enable SWBA interrupts
|
|
* if we need to manually prepare beacon frames. Otherwise we use a
|
|
* self-linked tx descriptor and let the hardware deal with things.
|
|
*/
|
|
intval |= ATH9K_BEACON_ENA;
|
|
if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL))
|
|
sc->imask |= ATH9K_INT_SWBA;
|
|
|
|
ath_beaconq_config(sc);
|
|
|
|
/* Set the computed ADHOC beacon timers */
|
|
|
|
ath9k_hw_set_interrupts(sc->sc_ah, 0);
|
|
ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval);
|
|
sc->beacon.bmisscnt = 0;
|
|
ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
|
|
|
|
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_VEOL)
|
|
ath_beacon_start_adhoc(sc, vif);
|
|
}
|
|
|
|
void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
|
|
{
|
|
struct ath_beacon_config conf;
|
|
|
|
/* Setup the beacon configuration parameters */
|
|
|
|
memset(&conf, 0, sizeof(struct ath_beacon_config));
|
|
conf.beacon_interval = sc->hw->conf.beacon_int ?
|
|
sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
|
|
conf.listen_interval = 1;
|
|
conf.dtim_period = conf.beacon_interval;
|
|
conf.dtim_count = 1;
|
|
conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval;
|
|
|
|
if (vif) {
|
|
struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
|
|
|
|
switch(avp->av_opmode) {
|
|
case NL80211_IFTYPE_AP:
|
|
ath_beacon_config_ap(sc, &conf, avp);
|
|
break;
|
|
case NL80211_IFTYPE_ADHOC:
|
|
case NL80211_IFTYPE_MESH_POINT:
|
|
ath_beacon_config_adhoc(sc, &conf, avp, vif);
|
|
break;
|
|
case NL80211_IFTYPE_STATION:
|
|
ath_beacon_config_sta(sc, &conf, avp);
|
|
break;
|
|
default:
|
|
DPRINTF(sc, ATH_DBG_CONFIG,
|
|
"Unsupported beaconing mode\n");
|
|
return;
|
|
}
|
|
|
|
sc->sc_flags |= SC_OP_BEACONS;
|
|
}
|
|
}
|