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11282a49b7
The Allwinner reset controller has 32-bit registers, so translating the reset cell number into a register and bit offset should not use any architecture dependent data size. Otherwise this breaks for 64-bit architectures like arm64. Fix this by making it clear that it's the hardware register width which matters here in the calculation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
180 lines
4.3 KiB
C
180 lines
4.3 KiB
C
/*
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* Allwinner SoCs Reset Controller driver
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*
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* Copyright 2013 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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struct sunxi_reset_data {
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spinlock_t lock;
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void __iomem *membase;
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struct reset_controller_dev rcdev;
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};
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static int sunxi_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct sunxi_reset_data *data = container_of(rcdev,
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struct sunxi_reset_data,
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rcdev);
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int reg_width = sizeof(u32);
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int bank = id / (reg_width * BITS_PER_BYTE);
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int offset = id % (reg_width * BITS_PER_BYTE);
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(&data->lock, flags);
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reg = readl(data->membase + (bank * reg_width));
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writel(reg & ~BIT(offset), data->membase + (bank * reg_width));
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spin_unlock_irqrestore(&data->lock, flags);
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return 0;
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}
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static int sunxi_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct sunxi_reset_data *data = container_of(rcdev,
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struct sunxi_reset_data,
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rcdev);
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int reg_width = sizeof(u32);
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int bank = id / (reg_width * BITS_PER_BYTE);
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int offset = id % (reg_width * BITS_PER_BYTE);
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unsigned long flags;
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u32 reg;
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spin_lock_irqsave(&data->lock, flags);
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reg = readl(data->membase + (bank * reg_width));
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writel(reg | BIT(offset), data->membase + (bank * reg_width));
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spin_unlock_irqrestore(&data->lock, flags);
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return 0;
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}
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static const struct reset_control_ops sunxi_reset_ops = {
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.assert = sunxi_reset_assert,
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.deassert = sunxi_reset_deassert,
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};
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static int sunxi_reset_init(struct device_node *np)
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{
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struct sunxi_reset_data *data;
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struct resource res;
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resource_size_t size;
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int ret;
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data = kzalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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ret = of_address_to_resource(np, 0, &res);
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if (ret)
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goto err_alloc;
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size = resource_size(&res);
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if (!request_mem_region(res.start, size, np->name)) {
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ret = -EBUSY;
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goto err_alloc;
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}
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data->membase = ioremap(res.start, size);
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if (!data->membase) {
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ret = -ENOMEM;
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goto err_alloc;
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}
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spin_lock_init(&data->lock);
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data->rcdev.owner = THIS_MODULE;
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data->rcdev.nr_resets = size * 32;
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data->rcdev.ops = &sunxi_reset_ops;
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data->rcdev.of_node = np;
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return reset_controller_register(&data->rcdev);
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err_alloc:
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kfree(data);
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return ret;
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};
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/*
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* These are the reset controller we need to initialize early on in
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* our system, before we can even think of using a regular device
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* driver for it.
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*/
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static const struct of_device_id sunxi_early_reset_dt_ids[] __initconst = {
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{ .compatible = "allwinner,sun6i-a31-ahb1-reset", },
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{ /* sentinel */ },
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};
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void __init sun6i_reset_init(void)
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{
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struct device_node *np;
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for_each_matching_node(np, sunxi_early_reset_dt_ids)
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sunxi_reset_init(np);
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}
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/*
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* And these are the controllers we can register through the regular
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* device model.
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*/
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static const struct of_device_id sunxi_reset_dt_ids[] = {
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{ .compatible = "allwinner,sun6i-a31-clock-reset", },
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{ /* sentinel */ },
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};
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static int sunxi_reset_probe(struct platform_device *pdev)
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{
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struct sunxi_reset_data *data;
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struct resource *res;
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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data->membase = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(data->membase))
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return PTR_ERR(data->membase);
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spin_lock_init(&data->lock);
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data->rcdev.owner = THIS_MODULE;
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data->rcdev.nr_resets = resource_size(res) * 32;
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data->rcdev.ops = &sunxi_reset_ops;
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data->rcdev.of_node = pdev->dev.of_node;
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return devm_reset_controller_register(&pdev->dev, &data->rcdev);
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}
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static struct platform_driver sunxi_reset_driver = {
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.probe = sunxi_reset_probe,
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.driver = {
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.name = "sunxi-reset",
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.of_match_table = sunxi_reset_dt_ids,
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},
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};
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builtin_platform_driver(sunxi_reset_driver);
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