linux/drivers/cxl
Dan Williams 23a22cd1c9 cxl/region: Allocate HPA capacity to regions
After a region's interleave parameters (ways and granularity) are set,
add a way for regions to allocate HPA (host physical address space) from
the free capacity in their parent root-decoder. The allocator for this
capacity reuses the 'struct resource' based allocator used for
CONFIG_DEVICE_PRIVATE.

Once the tuple of "ways, granularity, [uuid], and size" is set the
region configuration transitions to the CXL_CONFIG_INTERLEAVE_ACTIVE
state which is a precursor to allowing endpoint decoders to be added to
a region.

Co-developed-by: Ben Widawsky <bwidawsk@kernel.org>
Signed-off-by: Ben Widawsky <bwidawsk@kernel.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/165784335630.1758207.420216490941955417.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-07-25 12:18:06 -07:00
..
core cxl/region: Allocate HPA capacity to regions 2022-07-25 12:18:06 -07:00
acpi.c cxl/port: Record parent dport when adding ports 2022-07-21 17:19:24 -07:00
cxl.h cxl/region: Allocate HPA capacity to regions 2022-07-25 12:18:06 -07:00
cxlmem.h cxl/hdm: Enumerate allocated DPA 2022-07-21 17:19:12 -07:00
cxlpci.h cxl/port: Read CDAT table 2022-07-19 15:38:05 -07:00
Kconfig cxl/region: Allocate HPA capacity to regions 2022-07-25 12:18:06 -07:00
Makefile PM: CXL: Disable suspend 2022-04-22 16:09:42 -07:00
mem.c cxl/mem: Enumerate port targets before adding endpoints 2022-07-21 17:19:25 -07:00
pci.c cxl/pci: Create PCI DOE mailbox's for memory devices 2022-07-19 15:38:04 -07:00
pmem.c cxl/mbox: Use __le32 in get,set_lsa mailbox structures 2022-06-21 14:09:00 -07:00
port.c cxl/port: Read CDAT table 2022-07-19 15:38:05 -07:00