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239c249d06
When rt2x00pci will be switched over to dynamically mapped skb's instead of statically allocated DMA buffers, it no longer can handle alignment of RX packets in a copy step, and needs to implement the same scheme as rt2x00usb does. In order to make the patch on dynamically mapped skb's smaller, already centralize the alignment handling into rt2x00lib. This allows us to move more code in rt2x00lib, and thus remove code duplication between rt2x00usb and rt2x00pci. Signed-off-by: Gertjan van Wingerde <gwingerde@kpnplanet.nl> Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
488 lines
11 KiB
C
488 lines
11 KiB
C
/*
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Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
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<http://rt2x00.serialmonkey.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the
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Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/*
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Module: rt2x00pci
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Abstract: rt2x00 generic pci device routines.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include "rt2x00.h"
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#include "rt2x00pci.h"
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/*
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* TX data handlers.
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*/
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int rt2x00pci_write_tx_data(struct queue_entry *entry)
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{
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struct queue_entry_priv_pci *entry_priv = entry->priv_data;
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struct skb_frame_desc *skbdesc;
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u32 word;
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rt2x00_desc_read(entry_priv->desc, 0, &word);
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/*
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* This should not happen, we already checked the entry
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* was ours. When the hardware disagrees there has been
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* a queue corruption!
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*/
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if (unlikely(rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) ||
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rt2x00_get_field32(word, TXD_ENTRY_VALID))) {
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ERROR(entry->queue->rt2x00dev,
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"Corrupt queue %d, accessing entry which is not ours.\n"
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"Please file bug report to %s.\n",
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entry->queue->qid, DRV_PROJECT);
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return -EINVAL;
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}
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/*
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* Fill in skb descriptor
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*/
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skbdesc = get_skb_frame_desc(entry->skb);
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memset(skbdesc, 0, sizeof(*skbdesc));
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skbdesc->desc = entry_priv->desc;
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skbdesc->desc_len = entry->queue->desc_size;
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skbdesc->entry = entry;
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memcpy(entry_priv->data, entry->skb->data, entry->skb->len);
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return 0;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
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/*
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* TX/RX data handlers.
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*/
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void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
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{
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struct data_queue *queue = rt2x00dev->rx;
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struct queue_entry *entry;
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struct queue_entry_priv_pci *entry_priv;
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struct skb_frame_desc *skbdesc;
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struct rxdone_entry_desc rxdesc;
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u32 word;
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while (1) {
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entry = rt2x00queue_get_entry(queue, Q_INDEX);
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entry_priv = entry->priv_data;
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rt2x00_desc_read(entry_priv->desc, 0, &word);
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if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC))
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break;
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memset(&rxdesc, 0, sizeof(rxdesc));
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rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc);
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/*
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* Allocate the sk_buffer and copy all data into it.
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*/
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entry->skb = rt2x00queue_alloc_rxskb(queue);
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if (!entry->skb)
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return;
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memcpy(entry->skb->data, entry_priv->data, rxdesc.size);
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skb_trim(entry->skb, rxdesc.size);
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/*
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* Fill in skb descriptor
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*/
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skbdesc = get_skb_frame_desc(entry->skb);
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memset(skbdesc, 0, sizeof(*skbdesc));
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skbdesc->desc = entry_priv->desc;
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skbdesc->desc_len = queue->desc_size;
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skbdesc->entry = entry;
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/*
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* Send the frame to rt2x00lib for further processing.
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*/
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rt2x00lib_rxdone(entry, &rxdesc);
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if (test_bit(DEVICE_ENABLED_RADIO, &queue->rt2x00dev->flags)) {
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rt2x00_set_field32(&word, RXD_ENTRY_OWNER_NIC, 1);
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rt2x00_desc_write(entry_priv->desc, 0, word);
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}
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rt2x00queue_index_inc(queue, Q_INDEX);
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}
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
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void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct queue_entry *entry,
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struct txdone_entry_desc *txdesc)
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{
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struct queue_entry_priv_pci *entry_priv = entry->priv_data;
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enum data_queue_qid qid = skb_get_queue_mapping(entry->skb);
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u32 word;
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rt2x00lib_txdone(entry, txdesc);
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/*
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* Make this entry available for reuse.
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*/
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entry->flags = 0;
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rt2x00_desc_read(entry_priv->desc, 0, &word);
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rt2x00_set_field32(&word, TXD_ENTRY_OWNER_NIC, 0);
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rt2x00_set_field32(&word, TXD_ENTRY_VALID, 0);
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rt2x00_desc_write(entry_priv->desc, 0, word);
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__clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
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rt2x00queue_index_inc(entry->queue, Q_INDEX_DONE);
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/*
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* If the data queue was below the threshold before the txdone
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* handler we must make sure the packet queue in the mac80211 stack
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* is reenabled when the txdone handler has finished.
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*/
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if (!rt2x00queue_threshold(entry->queue))
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ieee80211_wake_queue(rt2x00dev->hw, qid);
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_txdone);
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/*
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* Device initialization handlers.
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*/
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#define desc_size(__queue) \
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({ \
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((__queue)->limit * (__queue)->desc_size);\
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})
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#define data_size(__queue) \
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({ \
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((__queue)->limit * (__queue)->data_size);\
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})
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#define dma_size(__queue) \
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({ \
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data_size(__queue) + desc_size(__queue);\
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})
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#define desc_offset(__queue, __base, __i) \
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({ \
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(__base) + data_size(__queue) + \
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((__i) * (__queue)->desc_size); \
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})
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#define data_offset(__queue, __base, __i) \
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({ \
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(__base) + \
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((__i) * (__queue)->data_size); \
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})
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static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
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struct data_queue *queue)
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{
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struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
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struct queue_entry_priv_pci *entry_priv;
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void *addr;
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dma_addr_t dma;
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unsigned int i;
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/*
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* Allocate DMA memory for descriptor and buffer.
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*/
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addr = pci_alloc_consistent(pci_dev, dma_size(queue), &dma);
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if (!addr)
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return -ENOMEM;
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memset(addr, 0, dma_size(queue));
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/*
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* Initialize all queue entries to contain valid addresses.
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*/
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for (i = 0; i < queue->limit; i++) {
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entry_priv = queue->entries[i].priv_data;
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entry_priv->desc = desc_offset(queue, addr, i);
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entry_priv->desc_dma = desc_offset(queue, dma, i);
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entry_priv->data = data_offset(queue, addr, i);
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entry_priv->data_dma = data_offset(queue, dma, i);
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}
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return 0;
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}
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static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
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struct data_queue *queue)
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{
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struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
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struct queue_entry_priv_pci *entry_priv =
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queue->entries[0].priv_data;
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if (entry_priv->data)
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pci_free_consistent(pci_dev, dma_size(queue),
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entry_priv->data, entry_priv->data_dma);
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entry_priv->data = NULL;
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}
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int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
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{
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struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
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struct data_queue *queue;
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int status;
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/*
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* Allocate DMA
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*/
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queue_for_each(rt2x00dev, queue) {
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status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
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if (status)
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goto exit;
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}
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/*
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* Register interrupt handler.
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*/
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status = request_irq(pci_dev->irq, rt2x00dev->ops->lib->irq_handler,
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IRQF_SHARED, pci_name(pci_dev), rt2x00dev);
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if (status) {
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ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
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pci_dev->irq, status);
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goto exit;
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}
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return 0;
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exit:
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queue_for_each(rt2x00dev, queue)
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rt2x00pci_free_queue_dma(rt2x00dev, queue);
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return status;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
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void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
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{
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struct data_queue *queue;
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/*
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* Free irq line.
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*/
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free_irq(rt2x00dev_pci(rt2x00dev)->irq, rt2x00dev);
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/*
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* Free DMA
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*/
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queue_for_each(rt2x00dev, queue)
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rt2x00pci_free_queue_dma(rt2x00dev, queue);
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
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/*
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* PCI driver handlers.
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*/
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static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
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{
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kfree(rt2x00dev->rf);
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rt2x00dev->rf = NULL;
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kfree(rt2x00dev->eeprom);
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rt2x00dev->eeprom = NULL;
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if (rt2x00dev->csr.base) {
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iounmap(rt2x00dev->csr.base);
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rt2x00dev->csr.base = NULL;
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}
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}
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static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
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{
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struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
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rt2x00dev->csr.base = ioremap(pci_resource_start(pci_dev, 0),
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pci_resource_len(pci_dev, 0));
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if (!rt2x00dev->csr.base)
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goto exit;
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rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
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if (!rt2x00dev->eeprom)
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goto exit;
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rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
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if (!rt2x00dev->rf)
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goto exit;
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return 0;
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exit:
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ERROR_PROBE("Failed to allocate registers.\n");
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rt2x00pci_free_reg(rt2x00dev);
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return -ENOMEM;
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}
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int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
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{
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struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
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struct ieee80211_hw *hw;
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struct rt2x00_dev *rt2x00dev;
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int retval;
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retval = pci_request_regions(pci_dev, pci_name(pci_dev));
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if (retval) {
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ERROR_PROBE("PCI request regions failed.\n");
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return retval;
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}
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retval = pci_enable_device(pci_dev);
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if (retval) {
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ERROR_PROBE("Enable device failed.\n");
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goto exit_release_regions;
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}
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pci_set_master(pci_dev);
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if (pci_set_mwi(pci_dev))
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ERROR_PROBE("MWI not available.\n");
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if (pci_set_dma_mask(pci_dev, DMA_64BIT_MASK) &&
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pci_set_dma_mask(pci_dev, DMA_32BIT_MASK)) {
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ERROR_PROBE("PCI DMA not supported.\n");
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retval = -EIO;
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goto exit_disable_device;
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}
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hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
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if (!hw) {
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ERROR_PROBE("Failed to allocate hardware.\n");
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retval = -ENOMEM;
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goto exit_disable_device;
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}
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pci_set_drvdata(pci_dev, hw);
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rt2x00dev = hw->priv;
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rt2x00dev->dev = pci_dev;
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rt2x00dev->ops = ops;
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rt2x00dev->hw = hw;
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retval = rt2x00pci_alloc_reg(rt2x00dev);
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if (retval)
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goto exit_free_device;
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retval = rt2x00lib_probe_dev(rt2x00dev);
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if (retval)
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goto exit_free_reg;
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return 0;
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exit_free_reg:
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rt2x00pci_free_reg(rt2x00dev);
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exit_free_device:
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ieee80211_free_hw(hw);
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exit_disable_device:
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if (retval != -EBUSY)
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pci_disable_device(pci_dev);
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exit_release_regions:
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pci_release_regions(pci_dev);
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pci_set_drvdata(pci_dev, NULL);
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return retval;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_probe);
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void rt2x00pci_remove(struct pci_dev *pci_dev)
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{
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struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
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struct rt2x00_dev *rt2x00dev = hw->priv;
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/*
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* Free all allocated data.
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*/
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rt2x00lib_remove_dev(rt2x00dev);
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rt2x00pci_free_reg(rt2x00dev);
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ieee80211_free_hw(hw);
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/*
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* Free the PCI device data.
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*/
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pci_set_drvdata(pci_dev, NULL);
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pci_disable_device(pci_dev);
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pci_release_regions(pci_dev);
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_remove);
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#ifdef CONFIG_PM
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int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
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{
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struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
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struct rt2x00_dev *rt2x00dev = hw->priv;
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int retval;
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retval = rt2x00lib_suspend(rt2x00dev, state);
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if (retval)
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return retval;
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rt2x00pci_free_reg(rt2x00dev);
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pci_save_state(pci_dev);
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pci_disable_device(pci_dev);
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return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
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int rt2x00pci_resume(struct pci_dev *pci_dev)
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{
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struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
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struct rt2x00_dev *rt2x00dev = hw->priv;
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int retval;
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if (pci_set_power_state(pci_dev, PCI_D0) ||
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pci_enable_device(pci_dev) ||
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pci_restore_state(pci_dev)) {
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ERROR(rt2x00dev, "Failed to resume device.\n");
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return -EIO;
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}
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retval = rt2x00pci_alloc_reg(rt2x00dev);
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if (retval)
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return retval;
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retval = rt2x00lib_resume(rt2x00dev);
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if (retval)
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goto exit_free_reg;
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return 0;
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exit_free_reg:
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rt2x00pci_free_reg(rt2x00dev);
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return retval;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_resume);
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#endif /* CONFIG_PM */
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/*
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* rt2x00pci module information.
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*/
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MODULE_AUTHOR(DRV_PROJECT);
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MODULE_VERSION(DRV_VERSION);
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MODULE_DESCRIPTION("rt2x00 pci library");
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MODULE_LICENSE("GPL");
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