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72 lines
1.7 KiB
C
72 lines
1.7 KiB
C
#ifndef __I386_SCHED_H
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#define __I386_SCHED_H
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#include <asm/desc.h>
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#include <asm/atomic.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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/*
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* Used for LDT copy/destruction.
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*/
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int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
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void destroy_context(struct mm_struct *mm);
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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#ifdef CONFIG_SMP
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unsigned cpu = smp_processor_id();
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if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
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per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_LAZY;
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#endif
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}
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static inline void switch_mm(struct mm_struct *prev,
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struct mm_struct *next,
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struct task_struct *tsk)
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{
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int cpu = smp_processor_id();
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if (likely(prev != next)) {
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/* stop flush ipis for the previous mm */
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cpu_clear(cpu, prev->cpu_vm_mask);
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#ifdef CONFIG_SMP
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per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
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per_cpu(cpu_tlbstate, cpu).active_mm = next;
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#endif
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cpu_set(cpu, next->cpu_vm_mask);
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/* Re-load page tables */
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load_cr3(next->pgd);
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/*
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* load the LDT, if the LDT is different:
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*/
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if (unlikely(prev->context.ldt != next->context.ldt))
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load_LDT_nolock(&next->context, cpu);
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}
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#ifdef CONFIG_SMP
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else {
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per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
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BUG_ON(per_cpu(cpu_tlbstate, cpu).active_mm != next);
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if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
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/* We were in lazy tlb mode and leave_mm disabled
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* tlb flush IPI delivery. We must reload %cr3.
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*/
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load_cr3(next->pgd);
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load_LDT_nolock(&next->context, cpu);
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}
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}
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#endif
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}
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#define deactivate_mm(tsk, mm) \
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asm("movl %0,%%fs ; movl %0,%%gs": :"r" (0))
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#define activate_mm(prev, next) \
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switch_mm((prev),(next),NULL)
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#endif
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